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SubjectRe: [PATCHv4 1/2] soc: qcom: llcc: Move attribute config to its own function
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Quoting Sai Prakash Ranjan (2020-09-14 04:12:59)
> Cleanup qcom_llcc_cfg_program() by moving llcc attribute
> configuration to a separate function of its own. Also
> correct misspelled 'instance' caught by checkpatch.
>
> Suggested-by: Stephen Boyd <swboyd@chromium.org>
> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
> ---
> drivers/soc/qcom/llcc-qcom.c | 75 ++++++++++++++++++++----------------
> 1 file changed, 41 insertions(+), 34 deletions(-)
>
> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
> index 429b5a60a1ba..60ee31842dea 100644
> --- a/drivers/soc/qcom/llcc-qcom.c
> +++ b/drivers/soc/qcom/llcc-qcom.c
> @@ -318,14 +318,50 @@ size_t llcc_get_slice_size(struct llcc_slice_desc *desc)
> }
> EXPORT_SYMBOL_GPL(llcc_get_slice_size);
>
> -static int qcom_llcc_cfg_program(struct platform_device *pdev)
> +static int qcom_llcc_attr_cfg(const struct llcc_slice_config *table)

Call it config? It's certainly not a table.

> {
> - int i;
> u32 attr1_cfg;
> u32 attr0_cfg;
> u32 attr1_val;
> u32 attr0_val;
> u32 max_cap_cacheline;
> + int ret;
> +
> + attr1_cfg = LLCC_TRP_ATTR1_CFGn(table->slice_id);
> + attr0_cfg = LLCC_TRP_ATTR0_CFGn(table->slice_id);

Can this move down to near where it is used?

> +
> + attr1_val = table->cache_mode;
> + attr1_val |= table->probe_target_ways << ATTR1_PROBE_TARGET_WAYS_SHIFT;
> + attr1_val |= table->fixed_size << ATTR1_FIXED_SIZE_SHIFT;
> + attr1_val |= table->priority << ATTR1_PRIORITY_SHIFT;
> +
> + max_cap_cacheline = MAX_CAP_TO_BYTES(table->max_cap);
> +
> + /* LLCC instances can vary for each target.

The /* should be on a line by itself.

> + * The SW writes to broadcast register which gets propagated
> + * to each llcc instance (llcc0,.. llccN).
> + * Since the size of the memory is divided equally amongst the
> + * llcc instances, we need to configure the max cap accordingly.
> + */
> + max_cap_cacheline = max_cap_cacheline / drv_data->num_banks;
> + max_cap_cacheline >>= CACHE_LINE_SIZE_SHIFT;
> + attr1_val |= max_cap_cacheline << ATTR1_MAX_CAP_SHIFT;
> +
> + attr0_val = table->res_ways & ATTR0_RES_WAYS_MASK;
> + attr0_val |= table->bonus_ways << ATTR0_BONUS_WAYS_SHIFT;
> +
> + ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val);
> + if (ret)
> + return ret;
> +
> + ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val);
> +
> + return ret;

return regmap_write(...)

> +}
> +
> +static int qcom_llcc_cfg_program(struct platform_device *pdev)
> +{
> + int i;
> u32 sz;
> int ret = 0;
> const struct llcc_slice_config *llcc_table;

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