Messages in this thread | | | Date | Fri, 11 Sep 2020 23:33:56 +0200 | From | Borislav Petkov <> | Subject | Re: [PATCH 2/4 v3] x86: AMD: Add hardware-enforced cache coherency as a CPUID feature |
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+ Tom.
On Fri, Sep 11, 2020 at 07:25:59PM +0000, Krish Sadhukhan wrote: > +#define X86_FEATURE_HW_CACHE_COHERENCY (11*32+ 7) /* AMD hardware-enforced cache coherency */
so before you guys paint the bikeshed all kinds of colors :), Tom (CCed) is digging out the official name. (If it is even uglier, we might keep on bikeshedding...).
Once you have that, add the "" after the comment - like X86_FEATURE_FENCE_SWAPGS_USER, for example, so that it doesn't show in /proc/cpuinfo as luserspace doesn't care about hw coherency between enc memory.
Thx.
-- Regards/Gruss, Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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