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Subject[PATCH v6 00/12] SVM cleanup and INVPCID feature support
The following series adds the support for PCID/INVPCID on AMD guests.
While doing it re-structured the vmcb_control_area data structure to
combine all the intercept vectors into one 32 bit array. Makes it easy
for future additions. Re-arranged few pcid related code to make it common
between SVM and VMX.

INVPCID interceptions are added only when the guest is running with shadow
page table enabled. In this case the hypervisor needs to handle the tlbflush
based on the type of invpcid instruction.

For the guests with nested page table (NPT) support, the INVPCID feature
works as running it natively. KVM does not need to do any special handling.

AMD documentation for INVPCID feature is available at "AMD64 Architecture
Programmer’s Manual Volume 2: System Programming, Pub. 24593 Rev. 3.34(or later)"

The documentation can be obtained at the links below:

One minor change in patch #04. Otherwise same as v5.
Updated all the patches by Reviewed-by.

All the changes are related to rebase.
Aplies cleanly on mainline and kvm(master) tree.
Resending it to get some attention.

1. Changed the functions __set_intercept/__clr_intercept/__is_intercept to
to vmcb_set_intercept/vmcb_clr_intercept/vmcb_is_intercept by passing
vmcb_control_area structure(Suggested by Paolo).
2. Rearranged the commit 7a35e515a7055 ("KVM: VMX: Properly handle kvm_read/write_guest_virt*())
to make it common across both SVM/VMX(Suggested by Jim Mattson).
3. Took care of few other comments from Jim Mattson. Dropped "Reviewed-by"
on few patches which I have changed since v3.

1. Addressing the comments from Jim Mattson. Follow the v2 link below
for the context.
2. Introduced the generic __set_intercept, __clr_intercept and is_intercept
using native __set_bit, clear_bit and test_bit.
3. Combined all the intercepts vectors into single 32 bit array.
4. Removed set_intercept_cr, clr_intercept_cr, set_exception_intercepts,
clr_exception_intercept etc. Used the generic set_intercept and
clr_intercept where applicable.
5. Tested both L1 guest and l2 nested guests.

- Taken care of few comments from Jim Mattson.
- KVM interceptions added only when tdp is off. No interceptions
when tdp is on.
- Reverted the fault priority to original order in VMX.


Babu Moger (12):
KVM: SVM: Introduce vmcb_(set_intercept/clr_intercept/_is_intercept)
KVM: SVM: Change intercept_cr to generic intercepts
KVM: SVM: Change intercept_dr to generic intercepts
KVM: SVM: Modify intercept_exceptions to generic intercepts
KVM: SVM: Modify 64 bit intercept field to two 32 bit vectors
KVM: SVM: Add new intercept vector in vmcb_control_area
KVM: nSVM: Cleanup nested_state data structure
KVM: SVM: Remove set_cr_intercept, clr_cr_intercept and is_cr_intercept
KVM: SVM: Remove set_exception_intercept and clr_exception_intercept
KVM: X86: Rename and move the function vmx_handle_memory_failure to x86.c
KVM: X86: Move handling of INVPCID types to x86
KVM:SVM: Enable INVPCID feature on AMD

arch/x86/include/asm/svm.h | 117 +++++++++++++++++++++++++----------
arch/x86/include/uapi/asm/svm.h | 2 +
arch/x86/kvm/svm/nested.c | 66 +++++++++-----------
arch/x86/kvm/svm/svm.c | 131 ++++++++++++++++++++++++++-------------
arch/x86/kvm/svm/svm.h | 87 +++++++++-----------------
arch/x86/kvm/trace.h | 21 ++++--
arch/x86/kvm/vmx/nested.c | 12 ++--
arch/x86/kvm/vmx/vmx.c | 95 ----------------------------
arch/x86/kvm/vmx/vmx.h | 2 -
arch/x86/kvm/x86.c | 106 ++++++++++++++++++++++++++++++++
arch/x86/kvm/x86.h | 3 +
11 files changed, 364 insertions(+), 278 deletions(-)


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