Messages in this thread | | | Subject | Re: [PATCH 1/1] ARM: dts: bcm2711: Enable ddr modes on emmc2 controller | From | Florian Fainelli <> | Date | Mon, 31 Aug 2020 15:00:20 -0700 |
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On 8/29/2020 4:15 PM, Tobias Schramm wrote: > This patch enables ddr modes for eMMC and SD storage on emmc2, > doubling transfer speed. Previously only single data rate modes were > used, wasting half the available throughput. > The bcm2711 supports both SD and eMMC storage using ddr modes. Testing > show that pcb layout of the Raspberry Pi 4 can support them, too. > > Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
This depends on Stefan's patch here:
https://lore.kernel.org/linux-arm-kernel/1598651234-29826-1-git-send-email-stefan.wahren@i2se.com/
I am fine with us taking the DTS patch, as long as they all land in 5.10 at some point.
> --- > arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts > index 222d7825e1ab..8b61e258e906 100644 > --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts > +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts > @@ -191,6 +191,8 @@ &emmc2 { > vqmmc-supply = <&sd_io_1v8_reg>; > vmmc-supply = <&sd_vcc_reg>; > broken-cd; > + mmc-ddr-3_3v; > + sd-uhs-ddr50; > status = "okay"; > }; > >
-- Florian
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