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    Subject[PATCH 4.14 049/228] arm64: dts: rockchip: fix rk3399-puma gmac reset gpio
    Date
    From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

    [ Upstream commit 8a445086f8af0b7b9bd8d1901d6f306bb154f70d ]

    The puma gmac node currently uses opposite active-values for the
    gmac phy reset pin. The gpio-declaration uses active-high while the
    separate snps,reset-active-low property marks the pin as active low.

    While on the kernel side this works ok, other DT users may get
    confused - as seen with uboot right now.

    So bring this in line and make both properties match, similar to the
    other Rockchip board.

    Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
    Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
    Link: https://lore.kernel.org/r/20200603132836.362519-1-heiko@sntech.de
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
    index b08a998ca1024..0d5679380b2a6 100644
    --- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
    +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
    @@ -193,7 +193,7 @@ &gmac {
    phy-mode = "rgmii";
    pinctrl-names = "default";
    pinctrl-0 = <&rgmii_pins>;
    - snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
    + snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
    snps,reset-active-low;
    snps,reset-delays-us = <0 10000 50000>;
    tx_delay = <0x10>;
    --
    2.25.1


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