Messages in this thread | | | From | Lukasz Stelmach <> | Subject | Re: [PATCH 2/8] spi: spi-s3s64xx: Add S3C64XX_SPI_QUIRK_CS_AUTO for Exynos3250 | Date | Thu, 20 Aug 2020 12:47:26 +0200 |
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It was <2020-08-19 śro 20:38>, when Mark Brown wrote: > On Wed, Aug 19, 2020 at 03:01:21PM +0200, Lukasz Stelmach wrote: >> It was <2020-08-19 śro 14:39>, when Krzysztof Kozlowski wrote: > >>> There is here no commit msg, no explanation. > >> As I wrote in the cover letter, this and previous commits make things >> work on Exynos3250 (ARTIK5 precisely). I can't explain why. I read >> everything I could about this HW and there were no details about >> automatic CS handling other than how to turn it on and off. > > What is similar about those other SoCs - could you be more specific > here, or what goes wrong if you don't set this?
Without the quirk set DMA transfers longer than 512 bytes fail. They simply stop and hit the timeout with a few (<20) bytes pending.
As far as I can tell the SPI controller is the same in different Exynos SoCs.
> The auto mode (or at least the auto mode that was on the Exynos7) is > not compatible with many SPI devices if the controller chip select is > actually in use, the quirk was added for controllers that just don't > have the manual mode.
According to the manual the auto mode makes the controller toggle CS between SPI packets (bytes?).
I didn't have any problem transferring data (>512 bytes) from the SPI device in the polling mode. Only the DMA caused problems. > See also: > > https://lore.kernel.org/linux-spi/CAAgF-BfGwcNzMx0meFVkJqNMTbQ4_PP1PZ3i6edOm6U3bc26_Q@mail.gmail.com/ > > for an explanation of the quirk. >
>> CS can also be controlled automatically by setting AUTO_N_MANUAL to 1 >> in CS_CFG. When it is auto CS automatically toggles between packet to >> packet. NCS_TIME_COUNT in CS_CFG controls the inactive period. The >> driver by default uses manual mode. But on exynos7 the manual mode is >> removed.
I *suspect* that the automatic CS toggling between packets gives better (?) synchronisation between the SPI device and the controller's internals and prevents some kind of a deadlock inside the controller. These are just speculations.
-- Łukasz Stelmach Samsung R&D Institute Poland Samsung Electronics [unhandled content-type:application/pgp-signature] | |