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SubjectRe: [PATCH 1/3] riscv: Set more data to cacheinfo
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On Fri, 03 Jul 2020 01:57:53 PDT (-0700), zong.li@sifive.com wrote:
> Set cacheinfo.{size,sets,line_size} for each cache node, then we can
> get these information from userland through auxiliary vector.
>
> Signed-off-by: Zong Li <zong.li@sifive.com>
> ---
> arch/riscv/kernel/cacheinfo.c | 59 ++++++++++++++++++++++++++---------
> 1 file changed, 44 insertions(+), 15 deletions(-)
>
> diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c
> index 4c90c07d8c39..cdd35e53fd98 100644
> --- a/arch/riscv/kernel/cacheinfo.c
> +++ b/arch/riscv/kernel/cacheinfo.c
> @@ -8,12 +8,46 @@
> #include <linux/of.h>
> #include <linux/of_device.h>
>
> -static void ci_leaf_init(struct cacheinfo *this_leaf,
> - struct device_node *node,
> - enum cache_type type, unsigned int level)
> +static void ci_leaf_init(struct cacheinfo *this_leaf, enum cache_type type,
> + unsigned int level, unsigned int size,
> + unsigned int sets, unsigned int line_size)
> {
> this_leaf->level = level;
> this_leaf->type = type;
> + this_leaf->size = size;
> + this_leaf->number_of_sets = sets;
> + this_leaf->coherency_line_size = line_size;
> +
> + /*
> + * If the cache is fully associative, there is no need to
> + * check the other properties.
> + */
> + if (!(sets == 1) && (sets > 0 && size > 0 && line_size > 0))
> + this_leaf->ways_of_associativity = (size / sets) / line_size;
> +}
> +
> +static void fill_cacheinfo(struct cacheinfo **this_leaf,
> + struct device_node *node, unsigned int level)
> +{
> + unsigned int size, sets, line_size;
> +
> + if (!of_property_read_u32(node, "cache-size", &size)) {
> + of_property_read_u32(node, "cache-block-size", &line_size);
> + of_property_read_u32(node, "cache-sets", &sets);

Presumably we should be checking for errors here as well, rather than just
passing arbitrary values to userspace?

> + ci_leaf_init((*this_leaf)++, CACHE_TYPE_UNIFIED, level, size, sets, line_size);
> + }
> +
> + if (!of_property_read_u32(node, "i-cache-size", &size)) {
> + of_property_read_u32(node, "i-cache-sets", &sets);
> + of_property_read_u32(node, "i-cache-block-size", &line_size);
> + ci_leaf_init((*this_leaf)++, CACHE_TYPE_INST, level, size, sets, line_size);
> + }
> +
> + if (!of_property_read_u32(node, "d-cache-size", &size)) {
> + of_property_read_u32(node, "d-cache-sets", &sets);
> + of_property_read_u32(node, "d-cache-block-size", &line_size);
> + ci_leaf_init((*this_leaf)++, CACHE_TYPE_DATA, level, size, sets, line_size);
> + }
> }
>
> static int __init_cache_level(unsigned int cpu)
> @@ -66,29 +100,24 @@ static int __populate_cache_leaves(unsigned int cpu)
> struct device_node *prev = NULL;
> int levels = 1, level = 1;
>
> - if (of_property_read_bool(np, "cache-size"))
> - ci_leaf_init(this_leaf++, np, CACHE_TYPE_UNIFIED, level);
> - if (of_property_read_bool(np, "i-cache-size"))
> - ci_leaf_init(this_leaf++, np, CACHE_TYPE_INST, level);
> - if (of_property_read_bool(np, "d-cache-size"))
> - ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level);
> + /* Level 1 caches in cpu node */
> + fill_cacheinfo(&this_leaf, np, level);
>
> + /* Next level caches in cache nodes */
> prev = np;
> while ((np = of_find_next_cache_node(np))) {
> of_node_put(prev);
> prev = np;
> +
> if (!of_device_is_compatible(np, "cache"))
> break;
> if (of_property_read_u32(np, "cache-level", &level))
> break;
> if (level <= levels)
> break;
> - if (of_property_read_bool(np, "cache-size"))
> - ci_leaf_init(this_leaf++, np, CACHE_TYPE_UNIFIED, level);
> - if (of_property_read_bool(np, "i-cache-size"))
> - ci_leaf_init(this_leaf++, np, CACHE_TYPE_INST, level);
> - if (of_property_read_bool(np, "d-cache-size"))
> - ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level);
> +
> + fill_cacheinfo(&this_leaf, np, level);
> +
> levels = level;
> }
> of_node_put(np);

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