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    SubjectRe: [PATCH v12 05/13] iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU
    On Mon, Aug 10, 2020 at 04:26:49PM -0600, Jordan Crouse wrote:
    > Add a special implementation for the SMMU attached to most Adreno GPU
    > target triggered from the qcom,adreno-smmu compatible string.
    >
    > The new Adreno SMMU implementation will enable split pagetables
    > (TTBR1) for the domain attached to the GPU device (SID 0) and
    > hard code it context bank 0 so the GPU hardware can implement
    > per-instance pagetables.
    >
    > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
    > ---
    >
    > drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 3 +
    > drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 156 ++++++++++++++++++++-
    > 2 files changed, 157 insertions(+), 2 deletions(-)
    >
    > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
    > index 88f17cc33023..d199b4bff15d 100644
    > --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
    > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
    > @@ -223,6 +223,9 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu)
    > of_device_is_compatible(np, "qcom,sm8250-smmu-500"))
    > return qcom_smmu_impl_init(smmu);
    >
    > + if (of_device_is_compatible(smmu->dev->of_node, "qcom,adreno-smmu"))
    > + return qcom_adreno_smmu_impl_init(smmu);
    > +
    > if (of_device_is_compatible(np, "marvell,ap806-smmu-500"))
    > smmu->impl = &mrvl_mmu500_impl;
    >
    > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
    > index be4318044f96..3be10145bf57 100644
    > --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
    > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
    > @@ -12,6 +12,138 @@ struct qcom_smmu {
    > struct arm_smmu_device smmu;
    > };
    >
    > +#define QCOM_ADRENO_SMMU_GPU_SID 0
    > +
    > +static bool qcom_adreno_smmu_is_gpu_device(struct device *dev)
    > +{
    > + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
    > + struct arm_smmu_master_cfg *cfg = dev_iommu_priv_get(dev);
    > + int idx, i;
    > +
    > + /*
    > + * The GPU will always use SID 0 so that is a handy way to uniquely
    > + * identify it and configure it for per-instance pagetables
    > + */
    > + for_each_cfg_sme(cfg, fwspec, i, idx) {
    > + u16 sid = FIELD_GET(ARM_SMMU_SMR_ID, fwspec->ids[i]);
    > +
    > + if (sid == QCOM_ADRENO_SMMU_GPU_SID)
    > + return true;
    > + }

    Is for_each_cfg_sme() really what you want here? You're not using idx for
    anything, so I guess it should really be a loop over the sids (e.g. a bog
    standard for loop from 0 to fw->num_ids - 1)?

    Will

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