Messages in this thread | | | Date | Tue, 11 Aug 2020 18:22:09 +0100 | From | Mark Brown <> | Subject | Re: [PATCH v3 2/2] ASoC: Intel: Add period size constraint on strago board |
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On Tue, Aug 11, 2020 at 11:54:38AM -0500, Pierre-Louis Bossart wrote:
> > constraint logic needs to know about this DSP limitation - it seems like > > none of this is going to change without something new going into the > > mix? We at least need a new question to ask about the DSP firmware I > > think.
> I just tested aplay -Dhw: on a Cyan Chromebook with the Ubuntu kernel 5.4, > and I see no issues with the 240 sample period. Same with 432, 960, 9600, > etc.
> I also tried just for fun what happens with 256 samples, and I don't see any > underflows thrown either, so I am wondering what exactly the problem is? > Something's not adding up. I would definitively favor multiple of 1ms > periods, since it's the only case that was productized, but there's got to > me something a side effect of how CRAS programs the hw_params.
Is it something that goes wrong with longer playbacks possibly (eg, someone watching a feature film or something)? [unhandled content-type:application/pgp-signature] | |