Messages in this thread | | | Date | Mon, 6 Jul 2020 12:25:57 +0200 | From | Peter Zijlstra <> | Subject | Re: [PATCH V3 13/23] perf/x86/intel/lbr: Factor out intel_pmu_store_lbr |
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On Fri, Jul 03, 2020 at 04:59:49PM -0400, Liang, Kan wrote: > On 7/3/2020 3:50 PM, Peter Zijlstra wrote:
> > If I'm not mistaken, this correctly deals with LBR_FORMAT_INFO, so can't > > we also use the intel_pmu_arch_lbr_read() function for that case? > > But the intel_pmu_arch_lbr_read() doesn't have the optimization > (LBR_NO_INFO) for the LBR_FORMAT_INFO. > https://lkml.kernel.org/r/tip-b16a5b52eb90d92b597257778e51e1fdc6423e64@git.kernel.org > > To apply the optimization, we need extra codes as below.
Right, I saw that, but shouldn't we support that for anything with this format anyway? That is, it's weird and inconsistent to not support PERF_SAMPLE_BRANCH_NO_{CYCLES,FLAGS} for PEBS/ARCH-LBR output.
Arguably, we should even support NO_CYCLES for FORMAT_TIME. Yes it's daft, but that's what you get for adding the ABI.
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