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SubjectRe: [PATCH v2] clk: bcm2835: Do not use prediv with bcm2711's PLLs
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On 7/30/2020 11:26 AM, Nicolas Saenz Julienne wrote:
> Contrary to previous SoCs, bcm2711 doesn't have a prescaler in the PLL
> feedback loop. Bypass it by zeroing fb_prediv_mask when running on
> bcm2711.
>
> Note that, since the prediv configuration bits were re-purposed, this
> was triggering miscalculations on all clocks hanging from the VPU clock,
> notably the aux UART, making its output unintelligible.
>
> Fixes: 42de9ad400af ("clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support")
> Reported-by: Nathan Chancellor <natechancellor@gmail.com>
> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian

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