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    SubjectRe: [PATCH v4 29/78] drm/vc4: crtc: Add a delay after disabling the PixelValve output
    Hi Maxime

    On Wed, 8 Jul 2020 at 18:43, Maxime Ripard <maxime@cerno.tech> wrote:
    >
    > In order to avoid pixels getting stuck in the (unflushable) FIFO between
    > the HVS and the PV, we need to add some delay after disabling the PV output
    > and before disabling the HDMI controller. 20ms seems to be good enough so
    > let's use that.
    >
    > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
    > ---
    > drivers/gpu/drm/vc4/vc4_crtc.c | 2 ++
    > 1 file changed, 2 insertions(+)
    >
    > diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
    > index d0b326e1df0a..7b178d67187f 100644
    > --- a/drivers/gpu/drm/vc4/vc4_crtc.c
    > +++ b/drivers/gpu/drm/vc4/vc4_crtc.c
    > @@ -403,6 +403,8 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc,
    > ret = wait_for(!(CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_VIDEN), 1);
    > WARN_ONCE(ret, "Timeout waiting for !PV_VCONTROL_VIDEN\n");
    >
    > + mdelay(20);

    mdelay for 20ms seems a touch unfriendly as it's a busy wait. Can we
    not msleep instead?

    Dave

    > +
    > if (vc4_encoder->post_crtc_disable)
    > vc4_encoder->post_crtc_disable(encoder);
    >
    > --
    > git-series 0.9.1

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