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SubjectRe: [PATCH V2] dt-bindings: pci: convert QCOM pci bindings to YAML
On Sun, Jul 26, 2020 at 9:07 AM Sivaprakash Murugesan
<sivaprak@qti.qualcomm.com> wrote:
>
> From: Sivaprakash Murugesan <sivaprak@codeaurora.org>
>
> Convert QCOM pci bindings to YAML schema
>
> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
> ---
> [v2]
> - Referenced pci-bus.yaml
> - removed duplicate properties already referenced by pci-bus.yaml
> - Addressed comments from Rob
> .../devicetree/bindings/pci/qcom,pcie.txt | 330 ---------------
> .../devicetree/bindings/pci/qcom,pcie.yaml | 447 +++++++++++++++++++++
> 2 files changed, 447 insertions(+), 330 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.txt
> create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.yaml


> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> new file mode 100644
> index 000000000000..ddb84f49ac1c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -0,0 +1,447 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/pci/qcom,pcie.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm PCI express root complex
> +
> +maintainers:
> + - Sivaprakash Murugesan <sivaprak@codeaurora.org>
> +
> +description:
> + QCOM PCIe controller uses Designware IP with Qualcomm specific hardware
> + wrappers.
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,pcie-apq8064
> + - qcom,pcie-apq8084
> + - qcom,pcie-ipq4019
> + - qcom,pcie-ipq8064
> + - qcom,pcie-ipq8074
> + - qcom,pcie-msm8996
> + - qcom,pcie-qcs404
> + - qcom,pcie-sdm845
> +
> + reg:
> + description: Register ranges as listed in the reg-names property

Can drop this.

> + maxItems: 4
> +
> + reg-names:
> + items:
> + - const: dbi
> + - const: elbi
> + - const: parf
> + - const: config
> +
> + ranges:
> + maxItems: 2
> +
> + interrupts:
> + items:
> + - description: MSI interrupts
> +
> + interrupt-names:
> + const: msi
> +
> + "#interrupt-cells":

In pci-bus.yaml, so you can drop.

> + const: 1
> +
> + interrupt-map-mask:

In pci-bus.yaml, so you can drop.

> + items:
> + - description: standard PCI properties to define mapping of PCIe
> + interface to interrupt numbers.
> +
> + interrupt-map:
> + maxItems: 4
> +
> + clocks:
> + minItems: 1
> + maxItems: 7
> +
> + clock-names:
> + minItems: 1
> + maxItems: 7
> +
> + resets:
> + minItems: 1
> + maxItems: 12
> +
> + reset-names:
> + minItems: 1
> + maxItems: 12
> +
> + power-domains:
> + maxItems: 1
> +
> + vdda-supply:
> + description: phandle to power supply
> +
> + vdda_phy-supply:
> + description: phandle to the power supply to PHY
> +
> + vdda_refclk-supply:
> + description: phandle to power supply for ref clock generator
> +
> + vddpe-3v3-supply:
> + description: PCIe endpoint power supply
> +
> + phys:
> + maxItems: 1
> + items:
> + - description: phandle to the PHY block

Can drop 'items'.

With those fixed,

Reviewed-by: Rob Herring <robh@kernel.org>

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