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    Subject[PATCH 5.7 115/179] dmaengine: fsl-edma: fix wrong tcd endianness for big-endian cpu
    Date
    From: Angelo Dureghello <angelo.dureghello@timesys.com>

    [ Upstream commit 8678c71c17721e0f771f135967ef0cce8f69ce9a ]

    Due to recent fixes in m68k arch-specific I/O accessor macros, this
    driver is not working anymore for ColdFire. Fix wrong tcd endianness
    removing additional swaps, since edma_writex() functions should already
    take care of any eventual swap if needed.

    Note, i could only test the change in ColdFire mcf54415 and Vybrid
    vf50 / Colibri where i don't see any issue. So, every feedback and
    test for all other SoCs involved is really appreciated.

    Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
    Reported-by: kbuild test robot <lkp@intel.com>
    Link: https://lore.kernel.org/r/20200701225205.1674463-1-angelo.dureghello@timesys.com
    Signed-off-by: Vinod Koul <vkoul@kernel.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/dma/fsl-edma-common.c | 26 ++++++++++++++------------
    1 file changed, 14 insertions(+), 12 deletions(-)

    diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
    index 5697c3622699b..9285884758b27 100644
    --- a/drivers/dma/fsl-edma-common.c
    +++ b/drivers/dma/fsl-edma-common.c
    @@ -352,26 +352,28 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan,
    /*
    * TCD parameters are stored in struct fsl_edma_hw_tcd in little
    * endian format. However, we need to load the TCD registers in
    - * big- or little-endian obeying the eDMA engine model endian.
    + * big- or little-endian obeying the eDMA engine model endian,
    + * and this is performed from specific edma_write functions
    */
    edma_writew(edma, 0, &regs->tcd[ch].csr);
    - edma_writel(edma, le32_to_cpu(tcd->saddr), &regs->tcd[ch].saddr);
    - edma_writel(edma, le32_to_cpu(tcd->daddr), &regs->tcd[ch].daddr);

    - edma_writew(edma, le16_to_cpu(tcd->attr), &regs->tcd[ch].attr);
    - edma_writew(edma, le16_to_cpu(tcd->soff), &regs->tcd[ch].soff);
    + edma_writel(edma, (s32)tcd->saddr, &regs->tcd[ch].saddr);
    + edma_writel(edma, (s32)tcd->daddr, &regs->tcd[ch].daddr);

    - edma_writel(edma, le32_to_cpu(tcd->nbytes), &regs->tcd[ch].nbytes);
    - edma_writel(edma, le32_to_cpu(tcd->slast), &regs->tcd[ch].slast);
    + edma_writew(edma, (s16)tcd->attr, &regs->tcd[ch].attr);
    + edma_writew(edma, tcd->soff, &regs->tcd[ch].soff);

    - edma_writew(edma, le16_to_cpu(tcd->citer), &regs->tcd[ch].citer);
    - edma_writew(edma, le16_to_cpu(tcd->biter), &regs->tcd[ch].biter);
    - edma_writew(edma, le16_to_cpu(tcd->doff), &regs->tcd[ch].doff);
    + edma_writel(edma, (s32)tcd->nbytes, &regs->tcd[ch].nbytes);
    + edma_writel(edma, (s32)tcd->slast, &regs->tcd[ch].slast);

    - edma_writel(edma, le32_to_cpu(tcd->dlast_sga),
    + edma_writew(edma, (s16)tcd->citer, &regs->tcd[ch].citer);
    + edma_writew(edma, (s16)tcd->biter, &regs->tcd[ch].biter);
    + edma_writew(edma, (s16)tcd->doff, &regs->tcd[ch].doff);
    +
    + edma_writel(edma, (s32)tcd->dlast_sga,
    &regs->tcd[ch].dlast_sga);

    - edma_writew(edma, le16_to_cpu(tcd->csr), &regs->tcd[ch].csr);
    + edma_writew(edma, (s16)tcd->csr, &regs->tcd[ch].csr);
    }

    static inline
    --
    2.25.1


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