Messages in this thread Patch in this message | | | From | Daniel Palmer <> | Subject | [PATCH 6/7] ARM:mstar: Add syscon node for "pmsleep" area | Date | Sun, 26 Jul 2020 13:39:47 +0900 |
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MStar v7 SoCs contain a region of registers that are in the always on domain that the vendor code calls the "pmsleep" area.
This area contains registers for a broad range of functionality and needs to be shared between drivers.
This patch adds a syscon node for the pmsleep area so that other drivers can access registers in the area.
Signed-off-by: Daniel Palmer <daniel@0x0f.com> --- arch/arm/boot/dts/mstar-v7.dtsi | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi index a73b1d162dfd..c8b192569d05 100644 --- a/arch/arm/boot/dts/mstar-v7.dtsi +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -73,6 +73,11 @@ riu: bus@1f000000 { #size-cells = <1>; ranges = <0x0 0x1f000000 0x00400000>; + pmsleep: syscon@1c00 { + compatible = "syscon"; + reg = <0x1c00 0x100>; + }; + l3bridge: l3bridge@204400 { compatible = "mstar,l3bridge"; reg = <0x204400 0x200>; -- 2.27.0
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