Messages in this thread | | | Date | Tue, 21 Jul 2020 16:08:47 +0300 | From | Mika Westerberg <> | Subject | Re: nouveau regression with 5.7 caused by "PCI/PM: Assume ports without DLL Link Active train links in 100 ms" |
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On Fri, Jul 17, 2020 at 09:52:09PM +0200, Lukas Wunner wrote: > On Fri, Jul 17, 2020 at 03:04:10PM -0400, Lyude Paul wrote: > > Isn't it possible to tell whether a PCI device is connected through > > thunderbolt or not? We could probably get away with just defaulting > > to 100ms for thunderbolt devices without DLL Link Active specified, > > and then default to the old delay value for non-thunderbolt devices. > > pci_is_thunderbolt_attached()
That only works with some devices. I think we should try to keep the fact that some PCIe links may be tunneled over TBT/USB4 transparent to the PCI core and try to treat them as "standard" PCIe links if possible at all :)
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