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    Subject[PATCH v4 37/75] x86/sev-es: Add SEV-ES Feature Detection
    Date
    From: Joerg Roedel <jroedel@suse.de>

    Add the sev_es_active function for checking whether SEV-ES is enabled.
    Also cache the value of MSR_AMD64_SEV at boot to speed up the feature
    checking in the running code.

    Signed-off-by: Joerg Roedel <jroedel@suse.de>
    ---
    arch/x86/include/asm/mem_encrypt.h | 3 +++
    arch/x86/include/asm/msr-index.h | 2 ++
    arch/x86/mm/mem_encrypt.c | 9 ++++++++-
    arch/x86/mm/mem_encrypt_identity.c | 3 +++
    4 files changed, 16 insertions(+), 1 deletion(-)

    diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h
    index 848ce43b9040..6f61bb93366a 100644
    --- a/arch/x86/include/asm/mem_encrypt.h
    +++ b/arch/x86/include/asm/mem_encrypt.h
    @@ -19,6 +19,7 @@
    #ifdef CONFIG_AMD_MEM_ENCRYPT

    extern u64 sme_me_mask;
    +extern u64 sev_status;
    extern bool sev_enabled;

    void sme_encrypt_execute(unsigned long encrypted_kernel_vaddr,
    @@ -49,6 +50,7 @@ void __init mem_encrypt_free_decrypted_mem(void);

    bool sme_active(void);
    bool sev_active(void);
    +bool sev_es_active(void);

    #define __bss_decrypted __attribute__((__section__(".bss..decrypted")))

    @@ -71,6 +73,7 @@ static inline void __init sme_enable(struct boot_params *bp) { }

    static inline bool sme_active(void) { return false; }
    static inline bool sev_active(void) { return false; }
    +static inline bool sev_es_active(void) { return false; }

    static inline int __init
    early_set_memory_decrypted(unsigned long vaddr, unsigned long size) { return 0; }
    diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
    index 2816eb01463f..cac329037777 100644
    --- a/arch/x86/include/asm/msr-index.h
    +++ b/arch/x86/include/asm/msr-index.h
    @@ -451,7 +451,9 @@
    #define MSR_AMD64_SEV_ES_GHCB 0xc0010130
    #define MSR_AMD64_SEV 0xc0010131
    #define MSR_AMD64_SEV_ENABLED_BIT 0
    +#define MSR_AMD64_SEV_ES_ENABLED_BIT 1
    #define MSR_AMD64_SEV_ENABLED BIT_ULL(MSR_AMD64_SEV_ENABLED_BIT)
    +#define MSR_AMD64_SEV_ES_ENABLED BIT_ULL(MSR_AMD64_SEV_ES_ENABLED_BIT)

    #define MSR_AMD64_VIRT_SPEC_CTRL 0xc001011f

    diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c
    index 4a781cf99e92..21be138ceef6 100644
    --- a/arch/x86/mm/mem_encrypt.c
    +++ b/arch/x86/mm/mem_encrypt.c
    @@ -38,6 +38,7 @@
    * section is later cleared.
    */
    u64 sme_me_mask __section(.data) = 0;
    +u64 sev_status __section(.data) = 0;
    EXPORT_SYMBOL(sme_me_mask);
    DEFINE_STATIC_KEY_FALSE(sev_enable_key);
    EXPORT_SYMBOL_GPL(sev_enable_key);
    @@ -347,7 +348,13 @@ bool sme_active(void)

    bool sev_active(void)
    {
    - return sme_me_mask && sev_enabled;
    + return !!(sev_status & MSR_AMD64_SEV_ENABLED);
    +}
    +
    +/* Needs to be called from non-instrumentable code */
    +bool noinstr sev_es_active(void)
    +{
    + return !!(sev_status & MSR_AMD64_SEV_ES_ENABLED);
    }

    /* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */
    diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c
    index e2b0e2ac07bb..68d75379e06a 100644
    --- a/arch/x86/mm/mem_encrypt_identity.c
    +++ b/arch/x86/mm/mem_encrypt_identity.c
    @@ -540,6 +540,9 @@ void __init sme_enable(struct boot_params *bp)
    if (!(msr & MSR_AMD64_SEV_ENABLED))
    return;

    + /* Save SEV_STATUS to avoid reading MSR again */
    + sev_status = msr;
    +
    /* SEV state cannot be controlled by a command line option */
    sme_me_mask = me_mask;
    sev_enabled = true;
    --
    2.27.0
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