Messages in this thread | | | Date | Mon, 13 Jul 2020 14:21:53 +0100 | From | Sudeep Holla <> | Subject | Re: [PATCH v2 2/2] clk: scmi: Fix min and max rate when registering clocks with discrete rates |
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On Fri, Jul 10, 2020 at 04:50:40PM -0700, Stephen Boyd wrote: > Quoting Sudeep Holla (2020-07-09 01:17:05) > > Currently we are not initializing the scmi clock with discrete rates > > correctly. We fetch the min_rate and max_rate value only for clocks with > > ranges and ignore the ones with discrete rates. This will lead to wrong > > initialization of rate range when clock supports discrete rate. > > > > Fix this by using the first and the last rate in the sorted list of the > > discrete clock rates while registering the clock. > > > > Link: https://lore.kernel.org/r/20200708110725.18017-2-sudeep.holla@arm.com > > Fixes: 6d6a1d82eaef7 ("clk: add support for clocks provided by SCMI") > > Reported-by: Dien Pham <dien.pham.ry@renesas.com> > > Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> > > --- > > drivers/clk/clk-scmi.c | 22 +++++++++++++++++++--- > > 1 file changed, 19 insertions(+), 3 deletions(-) > > > > Hi Stephen, > > > > If you are fine, I can take this via ARM SoC along with the change in > > firmware driver. However it is also fine if you want to merge this > > independently as there is no strict dependency. Let me know either way. > > I don't mind either way. If you want to send it in along with the > firmware change then that's fine. >
OK I have now queued and will send it to arm-soc.
> Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Thanks for the review.
-- Regards, Sudeep
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