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Subject[PATCH 2/2] clk: mediatek: Add EXPORT_SYMBOL for kernel module support
Date
Export common APIs from Mediatek clock driver.

Signed-off-by: Wendell Lin <wendell.lin@mediatek.com>
---
drivers/clk/mediatek/clk-mtk.c | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index cec1c8a..6b4dca1 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -13,6 +13,7 @@
#include <linux/clkdev.h>
#include <linux/mfd/syscon.h>
#include <linux/device.h>
+#include <linux/module.h>

#include "clk-mtk.h"
#include "clk-gate.h"
@@ -41,6 +42,7 @@ struct clk_onecell_data *mtk_alloc_clk_data(unsigned int clk_num)

return NULL;
}
+EXPORT_SYMBOL(mtk_alloc_clk_data);

void mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks,
int num, struct clk_onecell_data *clk_data)
@@ -67,6 +69,7 @@ void mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks,
clk_data->clks[rc->id] = clk;
}
}
+EXPORT_SYMBOL(mtk_clk_register_fixed_clks);

void mtk_clk_register_factors(const struct mtk_fixed_factor *clks,
int num, struct clk_onecell_data *clk_data)
@@ -93,6 +96,7 @@ void mtk_clk_register_factors(const struct mtk_fixed_factor *clks,
clk_data->clks[ff->id] = clk;
}
}
+EXPORT_SYMBOL(mtk_clk_register_factors);

int mtk_clk_register_gates_with_dev(struct device_node *node,
const struct mtk_gate *clks,
@@ -137,6 +141,7 @@ int mtk_clk_register_gates_with_dev(struct device_node *node,

return 0;
}
+EXPORT_SYMBOL(mtk_clk_register_gates_with_dev);

int mtk_clk_register_gates(struct device_node *node,
const struct mtk_gate *clks,
@@ -145,6 +150,7 @@ int mtk_clk_register_gates(struct device_node *node,
return mtk_clk_register_gates_with_dev(node,
clks, num, clk_data, NULL);
}
+EXPORT_SYMBOL(mtk_clk_register_gates);

struct clk *mtk_clk_register_composite(const struct mtk_composite *mc,
void __iomem *base, spinlock_t *lock)
@@ -232,6 +238,7 @@ struct clk *mtk_clk_register_composite(const struct mtk_composite *mc,

return ERR_PTR(ret);
}
+EXPORT_SYMBOL(mtk_clk_register_composite);

void mtk_clk_register_composites(const struct mtk_composite *mcs,
int num, void __iomem *base, spinlock_t *lock,
@@ -258,6 +265,7 @@ void mtk_clk_register_composites(const struct mtk_composite *mcs,
clk_data->clks[mc->id] = clk;
}
}
+EXPORT_SYMBOL(mtk_clk_register_composites);

void mtk_clk_register_dividers(const struct mtk_clk_divider *mcds,
int num, void __iomem *base, spinlock_t *lock,
@@ -286,3 +294,8 @@ void mtk_clk_register_dividers(const struct mtk_clk_divider *mcds,
clk_data->clks[mcd->id] = clk;
}
}
+EXPORT_SYMBOL(mtk_clk_register_dividers);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Mediatek Clocks");
+MODULE_AUTHOR("MediaTek Inc.");
--
1.7.9.5
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