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SubjectRe: [GIT PULL] RISC-V Patches for the 5.8 Merge Window, Part 1
On Thu, Jun 4, 2020 at 11:57 AM Palmer Dabbelt <palmer@dabbelt.com> wrote:
>
> The following changes since commit b9bbe6ed63b2b9f2c9ee5cbd0f2c946a2723f4ce:
>
> Linux 5.7-rc6 (2020-05-17 16:48:37 -0700)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.8-mw0
>
> for you to fetch changes up to 09c0533d129ce460e6214c14f744ddbac3733889:
>
> soc: sifive: l2 cache: Mark l2_get_priv_group as static (2020-05-28 15:57:49 -0700)
>
> ----------------------------------------------------------------
> RISC-V Patches for the 5.8 Merge Window, Part 1
>
> * The remainder of the code necessary to support the Kendryte K210.
> * Support for building device trees into the kernel, as the K210 doesn't
> have a bootloader that provides one.
> * A K210 device tree and the associated defconfig update.
> * Support for skipping PMP initialization on systems that trap on PMP
> accesses rather than treating them as WARL.
> * Support for KGDB.
> * Improvements to text patching.
> * Some cleanups to the SiFive L2 cache driver.
>
> I may have a second part, but I wanted to get this out earlier rather than
> later as they've been ready to go for a while now.
>
Hi Palmer,
Can you also add the run time cpu hotplug fix patch if it is not too late?

https://patchwork.kernel.org/patch/11581221/

Without the patch, cpu hotplug will broken for 5.8-rc1 too.

> ----------------------------------------------------------------
> Damien Le Moal (1):
> riscv: K210: Update defconfig
>
> Palmer Dabbelt (5):
> riscv: Allow device trees to be built into the kernel
> riscv: K210: Add a built-in device tree
> RISC-V: Skip setting up PMPs on traps
> soc: sifive: l2 cache: Eliminate an unsigned zero compare warning
> soc: sifive: l2 cache: Mark l2_get_priv_group as static
>
> Vincent Chen (4):
> kgdb: Add kgdb_has_hit_break function
> riscv: Add KGDB support
> riscv: Use the XML target descriptions to report 3 system registers
> riscv: Add SW single-step support for KDB
>
> Yash Shah (2):
> riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure
> riscv: Add support to determine no. of L2 cache way enabled
>
> Zong Li (3):
> riscv: Remove the 'riscv_' prefix of function name
> riscv: Use NOKPROBE_SYMBOL() instead of __krpobes annotation
> riscv: Use text_mutex instead of patch_lock
>
> arch/riscv/Kbuild | 1 +
> arch/riscv/Kconfig | 7 +
> arch/riscv/Kconfig.socs | 17 +-
> arch/riscv/boot/dts/Makefile | 2 +
> arch/riscv/boot/dts/kendryte/Makefile | 4 +-
> arch/riscv/configs/nommu_k210_defconfig | 7 +-
> arch/riscv/include/asm/cacheinfo.h | 15 ++
> arch/riscv/include/asm/gdb_xml.h | 117 ++++++++++
> arch/riscv/include/asm/kdebug.h | 12 +
> arch/riscv/include/asm/kgdb.h | 112 +++++++++
> arch/riscv/include/asm/parse_asm.h | 219 ++++++++++++++++++
> arch/riscv/include/asm/patch.h | 4 +-
> arch/riscv/include/asm/soc.h | 39 ++++
> arch/riscv/kernel/Makefile | 1 +
> arch/riscv/kernel/cacheinfo.c | 17 ++
> arch/riscv/kernel/ftrace.c | 15 +-
> arch/riscv/kernel/head.S | 11 +-
> arch/riscv/kernel/kgdb.c | 390 ++++++++++++++++++++++++++++++++
> arch/riscv/kernel/patch.c | 46 ++--
> arch/riscv/kernel/setup.c | 4 +
> arch/riscv/kernel/soc.c | 27 +++
> arch/riscv/kernel/traps.c | 5 +
> arch/riscv/kernel/vmlinux.lds.S | 5 +
> arch/riscv/mm/init.c | 9 +
> drivers/soc/kendryte/k210-sysctl.c | 12 +
> drivers/soc/sifive/sifive_l2_cache.c | 40 +++-
> kernel/debug/debug_core.c | 12 +
> 27 files changed, 1119 insertions(+), 31 deletions(-)
> create mode 100644 arch/riscv/include/asm/cacheinfo.h
> create mode 100644 arch/riscv/include/asm/gdb_xml.h
> create mode 100644 arch/riscv/include/asm/kdebug.h
> create mode 100644 arch/riscv/include/asm/kgdb.h
> create mode 100644 arch/riscv/include/asm/parse_asm.h
> create mode 100644 arch/riscv/kernel/kgdb.c
>


--
Regards,
Atish

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