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SubjectRe: [PATCH v3 055/105] drm/vc4: hvs: Introduce a function to get the assigned FIFO
Hi Eric,

On Wed, May 27, 2020 at 12:40:02PM -0700, Eric Anholt wrote:
> On Wed, May 27, 2020 at 8:50 AM Maxime Ripard <maxime@cerno.tech> wrote:
> >
> > At boot time, if we detect that a pixelvalve has been enabled, we need to
> > be able to retrieve the HVS channel it has been assigned to so that we can
> > disable that channel too. Let's create that function that returns the FIFO
> > or an error from a given output.
> >
> > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> > ---
>
> > +int vc4_hvs_get_fifo_from_output(struct drm_device *dev, unsigned int output)
> > +{
> > + struct vc4_dev *vc4 = to_vc4_dev(dev);
> > + u32 reg;
> > + int ret;
> > +
> > + switch (output) {
> > + case 0:
> > + return 0;
> > +
> > + case 1:
> > + return 1;
> > +
> > + case 2:
> > + reg = HVS_READ(SCALER_DISPECTRL);
> > + ret = FIELD_GET(SCALER_DISPECTRL_DSP2_MUX_MASK, reg);
> > + if (ret == 0)
> > + return 2;
> > +
> > + return 0;
> > +
> > + case 3:
> > + reg = HVS_READ(SCALER_DISPCTRL);
> > + ret = FIELD_GET(SCALER_DISPCTRL_DSP3_MUX_MASK, reg);
> > + if (ret == 3)
> > + return -EPIPE;
> > +
> > + return ret;
> > +
> > + case 4:
> > + reg = HVS_READ(SCALER_DISPEOLN);
> > + ret = FIELD_GET(SCALER_DISPEOLN_DSP4_MUX_MASK, reg);
> > + if (ret == 3)
> > + return -EPIPE;
> > +
> > + return ret;
> > +
> > + case 5:
> > + reg = HVS_READ(SCALER_DISPDITHER);
> > + ret = FIELD_GET(SCALER_DISPDITHER_DSP5_MUX_MASK, reg);
> > + if (ret == 3)
> > + return -EPIPE;
>
> Oh, FIELD_GET is new to me. Looks like we should replace
> VC4_GET_FIELD usage with just using that header, and also
> VC4_SET_FIELD with WARN_ON(!FIELD_FIT()); FIELD_PREP.
>
> Could you follow up with that?

I will :)

> Other than that, 54-67 r-b.

Thanks!
Maxime
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