Messages in this thread | | | Subject | Re: [PATCH v6 0/5] Micron SLC NAND filling block | From | Bean Huo <> | Date | Tue, 02 Jun 2020 10:59:46 +0200 |
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On Tue, 2020-06-02 at 09:48 +0200, Boris Brezillon wrote: > Hi Bean, > > On Mon, 01 Jun 2020 23:10:43 +0200 > Bean Huo <huobean@gmail.com> wrote: > > > Hi Richard > > would you please help us confirm below question?? > > Miquel suggested an approach that would allow us to deal with both > JFFS2 > and UBI/UBIFS without having any FS/wear-leveling specific code at > the > NAND level, but you decided to ignore his comments. Sorry but there's > nothing we can do to help you if you don't listen to our > recommendations.
Expose this issue to FS layer, it is not good idea. that will impact more code, and involve duplicated code. > > I've been quite disappointed by your behavior in the past, and it
> continues. Recently you've taken Miquel's patches and claimed > ownership did you seem my recent patch? you can ignore that see this.
> on them (probably not intentionally, but still) while you were > clearly > unable to rework your original series the way I suggested (which > Miquel > did after seeing you would never send new versions).
seriously?
> And when Miquel > suggested a change to the implementation he had done based on the > discussion we had with Richard, you decided to ignore it and pursue > in > the original direction. So, quite frankly, I'm really not convinced > you > can conduct such a change. >
As Miquel mentioned, we need richard's final comfirmation, If he agrees with this proposal, I give up my current patch.
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