Messages in this thread | | | Subject | Re: [PATCH v5 2/7] arm64: perf: Avoid PMXEV* indirection | From | Stephen Boyd <> | Date | Fri, 19 Jun 2020 01:26:20 -0700 |
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Quoting Alexandru Elisei (2020-06-18 03:51:08) > On 6/17/20 9:11 PM, Stephen Boyd wrote: > > Quoting Alexandru Elisei (2020-06-17 04:38:46) > >> From: Mark Rutland <mark.rutland@arm.com> > >> @@ -433,8 +494,9 @@ static u64 armv8pmu_read_counter(struct perf_event *event) > >> > >> static inline void armv8pmu_write_evcntr(int idx, u64 value) > >> { > >> - armv8pmu_select_counter(idx); > >> - write_sysreg(value, pmxevcntr_el0); > >> + u32 counter = ARMV8_IDX_TO_COUNTER(idx); > > Might be a good idea to make ARMV8_IDX_TO_COUNTER a static inline > > function that has a return type of u32. I had to go check the code to > > make sure it wasn't something larger. > > Architecturally, there are at most 32 counter registers, which would fit in an s8, > so I don't think type checking would really help us here.
Ok. It would have saved me a few seconds while reading the code, but I guess if I hold the architecture in my head I'll be ok too.
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