lkml.org 
[lkml]   [2020]   [Jun]   [11]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Subject[PATCH 0/3] INVPCID support for the AMD guests
From
Date
The following series adds the support for PCID/INVPCID on AMD guests.

For the guests with nested page table (NPT) support, the INVPCID
feature works as running it natively. KVM does not need to do any
special handling in this case.

KVM interceptions are required in the following cases.
1. If the guest tries to disable the feature when the underlying
hardware supports it. In this case hypervisor needs to report #UD.

2. When the guest is running with shadow page table enabled, in
this case the hypervisor needs to handle the tlbflush based on the
type of invpcid instruction type.

AMD documentation for INVPCID feature is available at "AMD64
Architecture Programmer’s Manual Volume 2: System Programming,
Pub. 24593 Rev. 3.34(or later)"

The documentation can be obtained at the links below:
Link: https://www.amd.com/system/files/TechDocs/24593.pdf
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
---

babu Moger (3):
KVM: X86: Move handling of INVPCID types to x86
KVM:SVM: Add extended intercept support
KVM:SVM: Enable INVPCID feature on AMD


arch/x86/include/asm/svm.h | 7 +++
arch/x86/include/uapi/asm/svm.h | 2 +
arch/x86/kvm/svm/nested.c | 6 ++-
arch/x86/kvm/svm/svm.c | 43 +++++++++++++++++++
arch/x86/kvm/svm/svm.h | 18 ++++++++
arch/x86/kvm/trace.h | 12 ++++-
arch/x86/kvm/vmx/vmx.c | 78 ----------------------------------
arch/x86/kvm/x86.c | 89 +++++++++++++++++++++++++++++++++++++++
arch/x86/kvm/x86.h | 2 +
9 files changed, 174 insertions(+), 83 deletions(-)

--

\
 
 \ /
  Last update: 2020-06-11 23:48    [W:0.767 / U:0.012 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site