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SubjectRe: [RFC-PATCH] mtd: spi-nor: add conditional 4B opcodes
Hi Daniel,

On 07/05/20 06:13PM, Daniel Walker (danielwa) wrote:
> On Thu, May 07, 2020 at 11:33:46PM +0530, Pratyush Yadav wrote:
> > On 07/05/20 09:20AM, Daniel Walker wrote:
> > > Some chips have 4B opcodes, but there is no way to know if they have
> > > them. This device tree option allows platform owners to force enable 4b
> > > opcodes when they know their chips support it even when it can be
> > > automatically identified.
> >
> > Do you mean that two chips might have the same ID but one of them can
> > support 4B opcodes and the other can not? Is it possible to detect this
> > in a fixup hook? I think it would be better to do something like this in
> > a fixup hook instead of via device tree.
>
> Yes. The chip I added the option for is an example of this, it's n25q256a. I'm not familiar with the
> fixup hook mechanism, but I would assume you need some way to tell between the 4B
> opcode chips and the non-4B opcode chips. For n25q256a, we have not found a way
> to do that.

I'm assuming this patch is related to [0]. If all you want is to address
memory above 16M, why not switch to 4-byte addressing mode instead?
Taking a quick look at the datasheet tells me this can be done via the
"Enter 4-byte address mode" command (0xB7). Then just use the regular
read/program commands with 4-byte addresses. Does that work for you? Is
there any reason you _have_ to use dedicated 4B opcodes?

[0] https://lore.kernel.org/linux-mtd/20200417174620.16420-1-danielwa@cisco.com/

--
Regards,
Pratyush Yadav

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