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    SubjectRe: [PATCH v2 05/20] mips: cm: Add L2 ECC/parity errors reporting
    On Wed, May 06, 2020 at 08:42:23PM +0300, Sergey.Semin@baikalelectronics.ru wrote:
    > From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
    >
    > According to the MIPS32 InterAptiv software manual error codes 24 - 26
    > of CM2 indicate L2 ECC/parity error with switching to a corresponding
    > errors info fields. This patch provides these errors parsing code,
    > which handles the read/write uncorrectable and correctable ECC/parity
    > errors, and prints instruction causing the fault, RAM array type, cache
    > way/dword and syndrome associated with the faulty data.
    >
    > Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
    > Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
    > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
    > Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
    > Cc: Paul Burton <paulburton@kernel.org>
    > Cc: Ralf Baechle <ralf@linux-mips.org>
    > Cc: Arnd Bergmann <arnd@arndb.de>
    > Cc: Rob Herring <robh+dt@kernel.org>
    > Cc: linux-pm@vger.kernel.org
    > Cc: devicetree@vger.kernel.org
    > ---
    > arch/mips/kernel/mips-cm.c | 62 ++++++++++++++++++++++++++++++++++++--
    > 1 file changed, 60 insertions(+), 2 deletions(-)

    applied to mips-next.

    Thomas.

    --
    Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
    good idea. [ RFC1925, 2.3 ]

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