Messages in this thread | | | Date | Thu, 7 May 2020 16:07:13 -0500 | From | Rob Herring <> | Subject | Re: [PATCH v4 02/12] PCI: aardvark: Don't blindly enable ASPM L0s and don't write to read-only register |
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On Thu, 30 Apr 2020 10:06:15 +0200, =?UTF-8?q?Pali=20Roh=C3=A1r?= wrote: > Trying to change Link Status register does not have any effect as this > is a read-only register. Trying to overwrite bits for Negotiated Link > Width does not make sense. > > In future proper change of link width can be done via Lane Count Select > bits in PCIe Control 0 register. > > Trying to unconditionally enable ASPM L0s via ASPM Control bits in Link > Control register is wrong. There should be at least some detection if > endpoint supports L0s as isn't mandatory. > > Moreover ASPM Control bits in Link Control register are controlled by > pcie/aspm.c code which sets it according to system ASPM settings, > immediately after aardvark driver probes. So setting these bits by > aardvark driver has no long running effect. > > Remove code which touches ASPM L0s bits from this driver and let > kernel's ASPM implementation to set ASPM state properly. > > Some users are reporting issues that this code is problematic for some > Intel wifi cards and removing it fixes them, see e.g.: > https://bugzilla.kernel.org/show_bug.cgi?id=196339 > > If problems with Intel wifi cards occur even after this commit, then > pcie/aspm.c code could be modified / hooked to not enable ASPM L0s state > for affected problematic cards. > > Signed-off-by: Pali Rohár <pali@kernel.org> > --- > drivers/pci/controller/pci-aardvark.c | 4 ---- > 1 file changed, 4 deletions(-) >
Acked-by: Rob Herring <robh@kernel.org>
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