Messages in this thread | | | From | Jim Quinlan <> | Subject | [PATCH v3 0/4] PCI: brcmstb: Some minor fixes/features | Date | Thu, 7 May 2020 16:15:39 -0400 |
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v3 -- A change was submitted to [1] to make 'aspm-no-l0s' a general property for PCIe devices. As such, the STB PCIe YAML file merely notes that it may be used.
v2 -- Dropped commit concerning CRS. -- Chanded new prop 'brcm,aspm-en-l0s' to 'aspm-no-l0s'. -- Capitalize first letter in commit subject line; spelling.
v1 -- original
[1] https://github.com/devicetree-org/dt-schema/blob/master/schemas/pci/pci-bus.yaml
Jim Quinlan (4): PCI: brcmstb: Don't clk_put() a managed clock PCI: brcmstb: Fix window register offset from 4 to 8 dt-bindings: PCI: brcmstb: New prop 'aspm-no-l0s' PCI: brcmstb: Disable L0s component of ASPM if requested
.../bindings/pci/brcm,stb-pcie.yaml | 2 ++ drivers/pci/controller/pcie-brcmstb.c | 19 +++++++++++++++---- 2 files changed, 17 insertions(+), 4 deletions(-)
-- 2.17.1
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