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SubjectRe: [PATCH v2 05/10] dt-bindings: dmaengine: convert Actions Semi Owl SoCs bindings to yaml
On Tue, May 19, 2020 at 11:49:23PM +0530, Amit Singh Tomar wrote:
> Converts the device tree bindings for the Actions Semi Owl SoCs DMA
> Controller over to YAML schemas.
>
> It also adds new compatible string "actions,s700-dma".
>
> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
> ---
> Change since v1:
> * Updated the description field to reflect
> only the necessary information.
> * replaced the maxItems field with description for each
> controller attribute(except interrupts).
> * Replaced the clock macro with number to keep the example
> as independent as possible.
>
> New patch, was not there in RFC.
> ---
> Documentation/devicetree/bindings/dma/owl-dma.txt | 47 -------------
> Documentation/devicetree/bindings/dma/owl-dma.yaml | 76 ++++++++++++++++++++++
> 2 files changed, 76 insertions(+), 47 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/dma/owl-dma.txt
> create mode 100644 Documentation/devicetree/bindings/dma/owl-dma.yaml
>
> diff --git a/Documentation/devicetree/bindings/dma/owl-dma.txt b/Documentation/devicetree/bindings/dma/owl-dma.txt
> deleted file mode 100644
> index 03e9bb12b75f..000000000000
> --- a/Documentation/devicetree/bindings/dma/owl-dma.txt
> +++ /dev/null
> @@ -1,47 +0,0 @@
> -* Actions Semi Owl SoCs DMA controller
> -
> -This binding follows the generic DMA bindings defined in dma.txt.
> -
> -Required properties:
> -- compatible: Should be "actions,s900-dma".
> -- reg: Should contain DMA registers location and length.
> -- interrupts: Should contain 4 interrupts shared by all channel.
> -- #dma-cells: Must be <1>. Used to represent the number of integer
> - cells in the dmas property of client device.
> -- dma-channels: Physical channels supported.
> -- dma-requests: Number of DMA request signals supported by the controller.
> - Refer to Documentation/devicetree/bindings/dma/dma.txt
> -- clocks: Phandle and Specifier of the clock feeding the DMA controller.
> -
> -Example:
> -
> -Controller:
> - dma: dma-controller@e0260000 {
> - compatible = "actions,s900-dma";
> - reg = <0x0 0xe0260000 0x0 0x1000>;
> - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
> - #dma-cells = <1>;
> - dma-channels = <12>;
> - dma-requests = <46>;
> - clocks = <&clock CLK_DMAC>;
> - };
> -
> -Client:
> -
> -DMA clients connected to the Actions Semi Owl SoCs DMA controller must
> -use the format described in the dma.txt file, using a two-cell specifier
> -for each channel.
> -
> -The two cells in order are:
> -1. A phandle pointing to the DMA controller.
> -2. The channel id.
> -
> -uart5: serial@e012a000 {
> - ...
> - dma-names = "tx", "rx";
> - dmas = <&dma 26>, <&dma 27>;
> - ...
> -};
> diff --git a/Documentation/devicetree/bindings/dma/owl-dma.yaml b/Documentation/devicetree/bindings/dma/owl-dma.yaml
> new file mode 100644
> index 000000000000..82e7d261e967
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/owl-dma.yaml
> @@ -0,0 +1,76 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/owl-dma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Actions Semi Owl SoCs DMA controller
> +
> +description: |
> + The OWL DMA is a general-purpose direct memory access controller capable of
> + supporting 10 and 12 independent DMA channels for S700 and S900 SoCs
> + respectively.
> +
> +maintainers:
> + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> +
> +allOf:
> + - $ref: "dma-controller.yaml#"
> +
> +properties:
> + compatible:
> + enum:
> + - actions,s900-dma
> + - actions,s700-dma
> +
> + reg:
> + description:
> + DMA registers location and length.

Don't need a description. Just need:

maxItems: 1

> +
> + interrupts:
> + description:
> + controller supports 4 interrupts, which are freely assignable to the
> + DMA channels.
> + maxItems: 4
> +
> + "#dma-cells":
> + const: 1
> +
> + dma-channels:
> + description:
> + Physical channels supported.

Already defined in dma-controller.yaml. You need to add any constraints.
2^32 channels okay?

> +
> + dma-requests:
> + description:
> + Number of DMA request signals supported by the controller.

Same here.

> +
> + clocks:
> + description:
> + Phandle and Specifier of the clock feeding the DMA controller.

How many?

> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - "#dma-cells"
> + - dma-channels
> + - dma-requests
> + - clocks

Add:

unevaluatedProperties: false

> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + dma: dma-controller@e0260000 {
> + compatible = "actions,s900-dma";
> + reg = <0x0 0xe0260000 0x0 0x1000>;
> + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
> + #dma-cells = <1>;
> + dma-channels = <12>;
> + dma-requests = <46>;
> + clocks = <&clock 22>;
> + };
> +
> +...
> --
> 2.7.4
>

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