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SubjectRe: [PATCH v2] mfd: tps65910: Correct power-off programming sequence
26.05.2020 18:01, Michał Mirosław пишет:
> On Sun, May 24, 2020 at 10:26:43PM +0300, Dmitry Osipenko wrote:
>> This patch fixes system shutdown on a devices that use TPS65910 as a
>> system's power controller. In accordance to the TPS65910 datasheet, the
>> PMIC's state-machine transitions into the OFF state only when DEV_OFF
>> bit of DEVCTRL_REG is set. The ON / SLEEP states also should be cleared,
>> otherwise PMIC won't get into a proper state on shutdown. Devices like
>> Nexus 7 tablet and Ouya game console are now shutting down properly.
> The datasheets of 65910 and 65911 say that ON and SLP bits are cleared
> during OFF state. But I guess the hardware might work differently.

Indeed, sounds like we can remove the SLP bit-clearing safely. IIUC,
both tps65910 and tps65911 are nearly the same in regards to the
power-off programming, tps65911 only supports an additional (sequential)
power-off mode.

I'm not sure whether we've tried to remove the SLP bit-clearing before,
will be interesting to try.

> [...]
>> --- a/drivers/mfd/tps65910.c
>> +++ b/drivers/mfd/tps65910.c
>> @@ -440,8 +440,13 @@ static void tps65910_power_off(void)
>> return;
>> - tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
>> + if (tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
>> + return;
>> +
>> + tps65910_reg_update_bits(tps65910, TPS65910_DEVCTRL,
>> }
> There is tps65910_reg_set_bits() at the start of function. I guess it
> doesn't work if your changes are needed. Maybe you can remove it?

It enables the "sequential power-off, reverse of power-on sequence",
like datasheet says. I think it works and we actually need that PWR_OFF
bit to be set separately, before setting the DEV_OFF bit.

> I would also include your observations about the chip's behaviour in the
> commit message so it doesn't get "fixed" later.

I'll add a clarifying comment about it in v3, thank you for the suggestions.

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