Messages in this thread Patch in this message | | | From | Lai Jiangshan <> | Subject | [RFC PATCH V2 3/7] x86/hw_breakpoint: Prevent data breakpoints on per_cpu cpu_tss_rw | Date | Tue, 26 May 2020 01:42:17 +0000 |
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cpu_tss_rw is not directly referenced by hardware, but cpu_tss_rw is also used in CPU entry code, especially when #DB shifts its stacks. If a data breakpoint is on the cpu_tss_rw.x86_tss.ist[IST_INDEX_DB], it will cause recursive #DB (and then #DF soon for #DB is generated after the access, IST-shifting, is done).
Cc: Andy Lutomirski <luto@kernel.org> Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: x86@kernel.org Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com> --- arch/x86/kernel/hw_breakpoint.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c index f859095c1b6c..7d3966b9aa12 100644 --- a/arch/x86/kernel/hw_breakpoint.c +++ b/arch/x86/kernel/hw_breakpoint.c @@ -255,6 +255,19 @@ static inline bool within_cpu_entry(unsigned long addr, unsigned long end) if (within_area(addr, end, (unsigned long)get_cpu_gdt_rw(cpu), GDT_SIZE)) return true; + + /* + * cpu_tss_rw is not directly referenced by hardware, but + * cpu_tss_rw is also used in CPU entry code, especially + * when #DB shifts its stacks. If a data breakpoint is on + * the cpu_tss_rw.x86_tss.ist[IST_INDEX_DB], it will cause + * recursive #DB (and then #DF soon for #DB is generated + * after the access, IST-shifting, is done). + */ + if (within_area(addr, end, + (unsigned long)&per_cpu(cpu_tss_rw, cpu), + sizeof(struct tss_struct))) + return true; } return false; -- 2.20.1
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