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SubjectRe: [PATCH v2 2/6] arm64: Add level-hinted TLB invalidation helper
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On 2020/5/22 23:50, Catalin Marinas wrote:
> On Thu, Apr 23, 2020 at 09:56:52PM +0800, Zhenyu Ye wrote:
>> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
>> index bc3949064725..5f9f189bc6d2 100644
>> --- a/arch/arm64/include/asm/tlbflush.h
>> +++ b/arch/arm64/include/asm/tlbflush.h
>> @@ -10,6 +10,7 @@
>>
>> #ifndef __ASSEMBLY__
>>
>> +#include <linux/bitfield.h>
>> #include <linux/mm_types.h>
>> #include <linux/sched.h>
>> #include <asm/cputype.h>
>> @@ -59,6 +60,35 @@
>> __ta; \
>> })
>>
>> +#define TLBI_TTL_MASK GENMASK_ULL(47, 44)
>> +
>> +#define __tlbi_level(op, addr, level) \
>> + do { \
>
> Nitpick: move "do {" on the same line as __tlbi_level() to reduce the
> indentation levels of the whole block.
>
> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
>

OK.

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