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Subject[PATCH v6 1/4] MIPS: Do not flush tlb page when updating PTE entry
It is not necessary to flush tlb page on all CPUs if suitable PTE
entry exists already during page fault handling, just updating
TLB is fine.

Here redefine flush_tlb_fix_spurious_fault as empty on MIPS system.
- Add update_mmu_tlb function as empty on all platform except mips
system, we use this function to update local tlb for page fault
smp-race handling
- define update_mmu_cache function specified on MIPS platform, and
add page fault smp-race stats info
- add pte_sw_mkyoung function to implement readable privilege, and
this function is only in effect on MIPS system.
- add page valid bit judgement in function pte_modify
- add detailed changelog, modify typo issue in patch V2
- split flush_tlb_fix_spurious_fault and tlb update into two patches
- comments typo modification
- separate tlb update and add pte readable privilege into two patches

Signed-off-by: Bibo Mao <>
arch/mips/include/asm/pgtable.h | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
index 9b01d2d..0d625c2 100644
--- a/arch/mips/include/asm/pgtable.h
+++ b/arch/mips/include/asm/pgtable.h
@@ -478,6 +478,8 @@ static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
return __pgprot(prot);

+#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
* Conversion functions: convert a page and protection to a page entry,
* and a page entry and page directory to the page they refer to.
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