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    SubjectRe: [PATCH 3.16 37/99] clk: tegra: Mark fuse clock as critical
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    On Wed, 2020-05-20 at 15:14 +0100, Ben Hutchings wrote:
    > 3.16.84-rc1 review patch. If anyone has any objections, please let me know.
    >
    > ------------------
    >
    > From: Stephen Warren <swarren@nvidia.com>
    >
    > commit bf83b96f87ae2abb1e535306ea53608e8de5dfbb upstream.

    I've now dropped this, as CLK_IS_CRITICAL is not implemented on 3.16.

    Ben.

    > For a little over a year, U-Boot on Tegra124 has configured the flow
    > controller to perform automatic RAM re-repair on off->on power
    > transitions of the CPU rail[1]. This is mandatory for correct operation
    > of Tegra124. However, RAM re-repair relies on certain clocks, which the
    > kernel must enable and leave running. The fuse clock is one of those
    > clocks. Mark this clock as critical so that LP1 power mode (system
    > suspend) operates correctly.
    >
    > [1] 3cc7942a4ae5 ARM: tegra: implement RAM repair
    >
    > Reported-by: Jonathan Hunter <jonathanh@nvidia.com>
    > Signed-off-by: Stephen Warren <swarren@nvidia.com>
    > Signed-off-by: Thierry Reding <treding@nvidia.com>
    > Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
    > ---
    > drivers/clk/tegra/clk-tegra-periph.c | 6 +++++-
    > 1 file changed, 5 insertions(+), 1 deletion(-)
    >
    > --- a/drivers/clk/tegra/clk-tegra-periph.c
    > +++ b/drivers/clk/tegra/clk-tegra-periph.c
    > @@ -517,7 +517,11 @@ static struct tegra_periph_init_data gat
    > GATE("vcp", "clk_m", 29, 0, tegra_clk_vcp, 0),
    > GATE("apbdma", "clk_m", 34, 0, tegra_clk_apbdma, 0),
    > GATE("kbc", "clk_32k", 36, TEGRA_PERIPH_ON_APB | TEGRA_PERIPH_NO_RESET, tegra_clk_kbc, 0),
    > - GATE("fuse", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse, 0),
    > + /*
    > + * Critical for RAM re-repair operation, which must occur on resume
    > + * from LP1 system suspend and as part of CCPLEX cluster switching.
    > + */
    > + GATE("fuse", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse, CLK_IS_CRITICAL),
    > GATE("fuse_burn", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse_burn, 0),
    > GATE("kfuse", "clk_m", 40, TEGRA_PERIPH_ON_APB, tegra_clk_kfuse, 0),
    > GATE("apbif", "clk_m", 107, TEGRA_PERIPH_ON_APB, tegra_clk_apbif, 0),
    >
    --
    Ben Hutchings
    All the simple programs have been written, and all the good names taken


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