Messages in this thread | | | Subject | Re: [PATCH V4 14/17] arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR2 register | From | Suzuki K Poulose <> | Date | Wed, 20 May 2020 14:56:09 +0100 |
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On 05/19/2020 10:40 AM, Anshuman Khandual wrote: > Enable EVT, BBM, TTL, IDS, ST, NV and CCIDX features bits in ID_AA64MMFR2 > register as per ARM DDI 0487F.a specification. > > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will@kernel.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Suzuki K Poulose <suzuki.poulose@arm.com> > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > > Suggested-by: Will Deacon <will@kernel.org> > Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Please note that there other series addressing TTL. So might have conflicts.
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
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