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SubjectRe: [PATCH v2 3/4] clk / soc: mediatek: Bind clock and gpu driver for mt2701
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On 20/05/2020 12:13, Stephen Boyd wrote:
> Quoting Enric Balletbo i Serra (2020-04-01 13:17:35)
>> Now that the mmsys driver is the top-level entry point for the
>> multimedia subsystem, we could bind the clock and the gpu driver on
>> those devices that is expected to work, so the drm driver is
>> intantiated by the mmsys driver and display, hopefully, working again.
>>
>> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
>> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
>> ---
>
> Acked-by: Stephen Boyd <sboyd@kernel.org>
>

Now queued for v5.7-next/soc

Thanks!

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