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    Subject[PATCH V3 15/16] arm64/cpufeature: Add remaining feature bits in ID_AA64DFR0 register
    Date
    Enable MTPMU and TRACEFILT features bits in ID_AA64DFR0 register as per ARM
    DDI 0487F.a specification.

    Cc: Catalin Marinas <catalin.marinas@arm.com>
    Cc: Will Deacon <will@kernel.org>
    Cc: Mark Rutland <mark.rutland@arm.com>
    Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-kernel@vger.kernel.org

    Suggested-by: Will Deacon <will@kernel.org>
    Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
    ---
    arch/arm64/include/asm/sysreg.h | 2 ++
    arch/arm64/kernel/cpufeature.c | 2 ++
    2 files changed, 4 insertions(+)

    diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
    index e0a612b2dc43..27ead8a6ff01 100644
    --- a/arch/arm64/include/asm/sysreg.h
    +++ b/arch/arm64/include/asm/sysreg.h
    @@ -762,6 +762,8 @@
    #define ID_AA64MMFR2_CNP_SHIFT 0

    /* id_aa64dfr0 */
    +#define ID_AA64DFR0_MTPMU_SHIFT 48
    +#define ID_AA64DFR0_TRACEFILT_SHIFT 40
    #define ID_AA64DFR0_PMSVER_SHIFT 32
    #define ID_AA64DFR0_CTX_CMPS_SHIFT 28
    #define ID_AA64DFR0_WRPS_SHIFT 20
    diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
    index a5e737d1a8fa..9869da9ac134 100644
    --- a/arch/arm64/kernel/cpufeature.c
    +++ b/arch/arm64/kernel/cpufeature.c
    @@ -363,6 +363,8 @@ static const struct arm64_ftr_bits ftr_id_mmfr0[] = {
    };

    static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = {
    + S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_MTPMU_SHIFT, 4, 0),
    + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_TRACEFILT_SHIFT, 4, 0),
    S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 36, 28, 0),
    ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64DFR0_PMSVER_SHIFT, 4, 0),
    ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_CTX_CMPS_SHIFT, 4, 0),
    --
    2.20.1
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