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SubjectRe: [PATCH V4 08/17] arm64/cpufeature: Add remaining feature bits in ID_MMFR4 register
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On 05/19/2020 10:40 AM, Anshuman Khandual wrote:
> Enable all remaining feature bits like EVT, CCIDX, LSM, HPDS, CnP, XNX,
> SpecSEI in ID_MMFR4 register per ARM DDI 0487F.a.
>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
>
> Suggested-by: Mark Rutland <mark.rutland@arm.com>
> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
> arch/arm64/include/asm/sysreg.h | 8 ++++++++
> arch/arm64/kernel/cpufeature.c | 13 +++++++++++++
> 2 files changed, 21 insertions(+)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 02b1246e7dbf..0a0cbb3add89 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -794,6 +794,14 @@
> #define ID_ISAR6_DP_SHIFT 4
> #define ID_ISAR6_JSCVT_SHIFT 0
>
> +#define ID_MMFR4_EVT_SHIFT 28
> +#define ID_MMFR4_CCIDX_SHIFT 24
> +#define ID_MMFR4_LSM_SHIFT 20
> +#define ID_MMFR4_HPDS_SHIFT 16
> +#define ID_MMFR4_CNP_SHIFT 12
> +#define ID_MMFR4_XNX_SHIFT 8
> +#define ID_MMFR4_SPECSEI_SHIFT 0
> +
> #define ID_MMFR5_ETS_SHIFT 0
>
> #define ID_PFR0_DIT_SHIFT 24
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index c929aed9fc4b..92186c40b817 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -392,7 +392,20 @@ static const struct arm64_ftr_bits ftr_id_isar5[] = {
> };
>
> static const struct arm64_ftr_bits ftr_id_mmfr4[] = {
> + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_MMFR4_EVT_SHIFT, 4, 0),
> + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_MMFR4_CCIDX_SHIFT, 4, 0),
> + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_MMFR4_LSM_SHIFT, 4, 0),
> + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_MMFR4_HPDS_SHIFT, 4, 0),
> + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_MMFR4_CNP_SHIFT, 4, 0),
> + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_MMFR4_XNX_SHIFT, 4, 0),
> ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, 4, 4, 0), /* ac2 */

nit: Please could you add the "ID_MMFR4_AC2_SHIFT", while you are at it ?

Suzuki

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