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    Subject[tip: x86/entry] x86/mce: Move nmi_enter/exit() into the entry point
    The following commit has been merged into the x86/entry branch of tip:

    Commit-ID: 46dbb1443cd5c4e1c892b820d7a578995a1708cf
    Gitweb: https://git.kernel.org/tip/46dbb1443cd5c4e1c892b820d7a578995a1708cf
    Author: Thomas Gleixner <tglx@linutronix.de>
    AuthorDate: Fri, 03 Apr 2020 22:37:31 +02:00
    Committer: Thomas Gleixner <tglx@linutronix.de>
    CommitterDate: Tue, 19 May 2020 16:04:08 +02:00

    x86/mce: Move nmi_enter/exit() into the entry point

    There is no reason to have nmi_enter/exit() in the actual MCE
    handlers. Move it to the entry point. This also covers the until now
    uncovered initial handler which only prints.

    Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
    Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
    Acked-by: Peter Zijlstra <peterz@infradead.org>
    Acked-by: Andy Lutomirski <luto@kernel.org>
    Link: https://lkml.kernel.org/r/20200505135314.243936614@linutronix.de


    ---
    arch/x86/kernel/cpu/mce/core.c | 26 +++++++++++++-------------
    arch/x86/kernel/cpu/mce/p5.c | 4 ----
    arch/x86/kernel/cpu/mce/winchip.c | 4 ----
    3 files changed, 13 insertions(+), 21 deletions(-)

    diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
    index e9265e2..f5993ed 100644
    --- a/arch/x86/kernel/cpu/mce/core.c
    +++ b/arch/x86/kernel/cpu/mce/core.c
    @@ -1100,8 +1100,10 @@ static void mce_clear_state(unsigned long *toclear)
    * kdump kernel establishing a new #MC handler where a broadcasted MCE
    * might not get handled properly.
    */
    -static bool __mc_check_crashing_cpu(int cpu)
    +static noinstr bool mce_check_crashing_cpu(void)
    {
    + unsigned int cpu = smp_processor_id();
    +
    if (cpu_is_offline(cpu) ||
    (crashing_cpu != -1 && crashing_cpu != cpu)) {
    u64 mcgstatus;
    @@ -1235,7 +1237,6 @@ void noinstr do_machine_check(struct pt_regs *regs, long error_code)
    DECLARE_BITMAP(valid_banks, MAX_NR_BANKS);
    DECLARE_BITMAP(toclear, MAX_NR_BANKS);
    struct mca_config *cfg = &mca_cfg;
    - int cpu = smp_processor_id();
    struct mce m, *final;
    char *msg = NULL;
    int worst = 0;
    @@ -1264,11 +1265,6 @@ void noinstr do_machine_check(struct pt_regs *regs, long error_code)
    */
    int lmce = 1;

    - if (__mc_check_crashing_cpu(cpu))
    - return;
    -
    - nmi_enter();
    -
    this_cpu_inc(mce_exception_count);

    mce_gather_info(&m, regs);
    @@ -1356,7 +1352,7 @@ void noinstr do_machine_check(struct pt_regs *regs, long error_code)
    sync_core();

    if (worst != MCE_AR_SEVERITY && !kill_it)
    - goto out_ist;
    + return;

    /* Fault was in user mode and we need to take some action */
    if ((m.cs & 3) == 3) {
    @@ -1373,9 +1369,6 @@ void noinstr do_machine_check(struct pt_regs *regs, long error_code)
    if (!fixup_exception(regs, X86_TRAP_MC, error_code, 0))
    mce_panic("Failed kernel mode recovery", &m, msg);
    }
    -
    -out_ist:
    - nmi_exit();
    }
    EXPORT_SYMBOL_GPL(do_machine_check);

    @@ -1912,11 +1905,18 @@ static void unexpected_machine_check(struct pt_regs *regs, long error_code)
    void (*machine_check_vector)(struct pt_regs *, long error_code) =
    unexpected_machine_check;

    -dotraplinkage notrace void do_mce(struct pt_regs *regs, long error_code)
    +dotraplinkage noinstr void do_mce(struct pt_regs *regs, long error_code)
    {
    + if (machine_check_vector == do_machine_check &&
    + mce_check_crashing_cpu())
    + return;
    +
    + nmi_enter();
    +
    machine_check_vector(regs, error_code);
    +
    + nmi_exit();
    }
    -NOKPROBE_SYMBOL(do_mce);

    /*
    * Called for each booted CPU to set up machine checks.
    diff --git a/arch/x86/kernel/cpu/mce/p5.c b/arch/x86/kernel/cpu/mce/p5.c
    index 5ee94aa..dc29f0f 100644
    --- a/arch/x86/kernel/cpu/mce/p5.c
    +++ b/arch/x86/kernel/cpu/mce/p5.c
    @@ -25,8 +25,6 @@ static void pentium_machine_check(struct pt_regs *regs, long error_code)
    {
    u32 loaddr, hi, lotype;

    - nmi_enter();
    -
    rdmsr(MSR_IA32_P5_MC_ADDR, loaddr, hi);
    rdmsr(MSR_IA32_P5_MC_TYPE, lotype, hi);

    @@ -39,8 +37,6 @@ static void pentium_machine_check(struct pt_regs *regs, long error_code)
    }

    add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);
    -
    - nmi_exit();
    }

    /* Set up machine check reporting for processors with Intel style MCE: */
    diff --git a/arch/x86/kernel/cpu/mce/winchip.c b/arch/x86/kernel/cpu/mce/winchip.c
    index b3938c1..3f8f84b 100644
    --- a/arch/x86/kernel/cpu/mce/winchip.c
    +++ b/arch/x86/kernel/cpu/mce/winchip.c
    @@ -19,12 +19,8 @@
    /* Machine check handler for WinChip C6: */
    static void winchip_machine_check(struct pt_regs *regs, long error_code)
    {
    - nmi_enter();
    -
    pr_emerg("CPU0: Machine Check Exception.\n");
    add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);
    -
    - nmi_exit();
    }

    /* Set up machine check reporting on the Winchip C6 series */
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