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    Subject[PATCH v11 01/11] perf/x86: Fix variable types for LBR registers
    Date
    From: Wei Wang <wei.w.wang@intel.com>

    The msr variable type can be 'unsigned int', which uses less memory than
    the longer 'unsigned long'. Fix 'struct x86_pmu' for that. The lbr_nr won't
    be a negative number, so make it 'unsigned int' as well.

    Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
    Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org>
    Signed-off-by: Wei Wang <wei.w.wang@intel.com>
    ---
    arch/x86/events/perf_event.h | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
    index f1cd1ca1a77b..1025bc6eb04f 100644
    --- a/arch/x86/events/perf_event.h
    +++ b/arch/x86/events/perf_event.h
    @@ -672,8 +672,8 @@ struct x86_pmu {
    /*
    * Intel LBR
    */
    - unsigned long lbr_tos, lbr_from, lbr_to; /* MSR base regs */
    - int lbr_nr; /* hardware stack size */
    + unsigned int lbr_tos, lbr_from, lbr_to,
    + lbr_nr; /* LBR base regs and size */
    u64 lbr_sel_mask; /* LBR_SELECT valid bits */
    const int *lbr_sel_map; /* lbr_select mappings */
    bool lbr_double_abort; /* duplicated lbr aborts */
    --
    2.21.3
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