Messages in this thread | | | From | "Ravich, Leonid" <> | Subject | RE: CMA enhancement - non-default areas in x86 | Date | Wed, 13 May 2020 08:29:16 +0000 |
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PCIe NTB Documentation/driver-api/ntb.rst
1) Basically PCI bridge between to root complex / PCI switches 2) using out of OS memory is one solution but then this memory is Limited for usage by other stack, ex: get_user_pages on this memory will fail, Therefore attempting to use it for block layer with (o_direct) will fail.
Acutely any generic stack which attempts to "pin" this memory will fail.
Leonid Ravich > -----Original Message----- > From: gregkh@linuxfoundation.org <gregkh@linuxfoundation.org> > Sent: Wednesday, May 13, 2020 10:14 AM > To: Idgar, Or > Cc: linux-kernel@vger.kernel.org; linux-mm@kvack.org; Ravich, Leonid > Subject: Re: CMA enhancement - non-default areas in x86 > > On Wed, May 13, 2020 at 07:00:12AM +0000, Idgar, Or wrote: > > > For what type of device? > > NTB (Non-Transparent Bridge). > > > Very odd quoting style... > > Anyway, what exactly is a non-transparent bridge, and why doesn't your > bios/uefi implementation properly reserve the memory for it so that the OS > does not use it? > > thanks, > > greg k-h
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