Messages in this thread | | | From | Song Liu <> | Subject | Re: [PATCH v12] perf: Sharing PMU counters across compatible events | Date | Wed, 29 Apr 2020 20:44:54 +0000 |
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> On Apr 20, 2020, at 4:04 PM, Peter Zijlstra <peterz@infradead.org> wrote: >> >> static inline u64 perf_event_count(struct perf_event *event) >> { >> - return local64_read(&event->count) + atomic64_read(&event->child_count); >> + u64 count; >> + >> + if (likely(event->dup_master != event)) >> + count = local64_read(&event->count); >> + else >> + count = local64_read(&event->master_count); >> + >> + return count + atomic64_read(&event->child_count); >> } > > So lsat time I said something about SMP ordering here. Where did that > go?
I am not quite sure about this one. I guess the following is sufficient. Could you please help me double check?
Thanks, Song
static inline u64 perf_event_count(struct perf_event *event) { struct perf_event *master; u64 count;
again: master = READ_ONCE(event->dup_master); if (master == EVENT_TOMBSTONE) goto again;
if (likely(master != event)) count = local64_read(&event->count); else count = local64_read(&event->master_count);
return count + atomic64_read(&event->child_count); }
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