Messages in this thread | | | Subject | Re: [PATCH 1/3] KVM: x86/mmu: Tweak PSE hugepage handling to avoid 2M vs 4M conundrum | From | Barret Rhoden <> | Date | Tue, 28 Apr 2020 10:07:27 -0400 |
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On 4/27/20 8:54 PM, Sean Christopherson wrote: > Change the PSE hugepage handling in walk_addr_generic() to fire on any > page level greater than PT_PAGE_TABLE_LEVEL, a.k.a. PG_LEVEL_4K. PSE > paging only has two levels, so "== 2" and "> 1" are functionally the > seam, i.e. this is a nop. ^ s/seam/same/
Barret
> > A future patch will drop KVM's PT_*_LEVEL enums in favor of the kernel's > PG_LEVEL_* enums, at which point "walker->level == PG_LEVEL_2M" is > semantically incorrect (though still functionally ok). > > No functional change intended. > > Suggested-by: Paolo Bonzini <pbonzini@redhat.com> > Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> > --- > arch/x86/kvm/mmu/paging_tmpl.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h > index efec7d27b8c5..ca39bd315f70 100644 > --- a/arch/x86/kvm/mmu/paging_tmpl.h > +++ b/arch/x86/kvm/mmu/paging_tmpl.h > @@ -436,7 +436,7 @@ static int FNAME(walk_addr_generic)(struct guest_walker *walker, > gfn = gpte_to_gfn_lvl(pte, walker->level); > gfn += (addr & PT_LVL_OFFSET_MASK(walker->level)) >> PAGE_SHIFT; > > - if (PTTYPE == 32 && walker->level == PT_DIRECTORY_LEVEL && is_cpuid_PSE36()) > + if (PTTYPE == 32 && walker->level > PT_PAGE_TABLE_LEVEL && is_cpuid_PSE36()) > gfn += pse36_gfn_delta(pte); > > real_gpa = mmu->translate_gpa(vcpu, gfn_to_gpa(gfn), access, &walker->fault); >
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