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    Subject[PATCH 5.4 078/168] net: dsa: b53: b53_arl_rw_op() needs to select IVL or SVL
    Date
    From: Florian Fainelli <f.fainelli@gmail.com>

    [ Upstream commit 64fec9493f7dc9bdd7233bcfe98985c45bd0e3c1 ]

    Flip the IVL_SVL_SELECT bit correctly based on the VLAN enable status,
    the default is to perform Shared VLAN learning instead of Individual
    learning.

    Fixes: 1da6df85c6fb ("net: dsa: b53: Implement ARL add/del/dump operations")
    Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/net/dsa/b53/b53_common.c | 4 ++++
    drivers/net/dsa/b53/b53_regs.h | 1 +
    2 files changed, 5 insertions(+)

    --- a/drivers/net/dsa/b53/b53_common.c
    +++ b/drivers/net/dsa/b53/b53_common.c
    @@ -1441,6 +1441,10 @@ static int b53_arl_rw_op(struct b53_devi
    reg |= ARLTBL_RW;
    else
    reg &= ~ARLTBL_RW;
    + if (dev->vlan_enabled)
    + reg &= ~ARLTBL_IVL_SVL_SELECT;
    + else
    + reg |= ARLTBL_IVL_SVL_SELECT;
    b53_write8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, reg);

    return b53_arl_op_wait(dev);
    --- a/drivers/net/dsa/b53/b53_regs.h
    +++ b/drivers/net/dsa/b53/b53_regs.h
    @@ -292,6 +292,7 @@
    /* ARL Table Read/Write Register (8 bit) */
    #define B53_ARLTBL_RW_CTRL 0x00
    #define ARLTBL_RW BIT(0)
    +#define ARLTBL_IVL_SVL_SELECT BIT(6)
    #define ARLTBL_START_DONE BIT(7)

    /* MAC Address Index Register (48 bit) */

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