lkml.org 
[lkml]   [2020]   [Apr]   [27]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH 2/2] arm: dts: stm32f769-disco: Enable MIPI DSI display support
From
Date
Hi Adrian

On 4/24/20 8:21 PM, Adrian Pop wrote:
> STM32f769-disco features a 4" MIPI DSI display: add support for it.
>
> Signed-off-by: Adrian Pop <pop.adrian61@gmail.com>
> ---

Commit title should be ARM: dts: stm32: ...

Can you explain a bit more in your commit message why do you use a
reserved memory pool for DMA and where this pool is located. (I assume
it's linked to a story of DMA and cache memory attribute on cortexM7...)

Did you try this configuration with XIP boot ?

regards
alex

> arch/arm/boot/dts/stm32f746.dtsi | 34 ++++++++++++++++++
> arch/arm/boot/dts/stm32f769-disco.dts | 50 +++++++++++++++++++++++++++
> 2 files changed, 84 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
> index 93c063796780..202bb6edc9f1 100644
> --- a/arch/arm/boot/dts/stm32f746.dtsi
> +++ b/arch/arm/boot/dts/stm32f746.dtsi
> @@ -48,6 +48,19 @@ / {
> #address-cells = <1>;
> #size-cells = <1>;
>
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + linux,dma {
> + compatible = "shared-dma-pool";
> + linux,dma-default;
> + no-map;
> + size = <0x10F000>;
> + };
> + };
> +
> clocks {
> clk_hse: clk-hse {
> #clock-cells = <0>;
> @@ -75,6 +88,27 @@ clk_i2s_ckin: clk-i2s-ckin {
> };
>
> soc {
> + ltdc: display-controller@40016800 {
> + compatible = "st,stm32-ltdc";
> + reg = <0x40016800 0x200>;
> + interrupts = <88>, <89>;
> + resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
> + clocks = <&rcc 1 CLK_LCD>;
> + clock-names = "lcd";
> + status = "disabled";
> + };
> +
> + dsi: dsi@40016c00 {
> + compatible = "st,stm32-dsi";
> + reg = <0x40016c00 0x800>;
> + interrupts = <98>;
> + clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
> + clock-names = "pclk", "ref";
> + resets = <&rcc STM32F7_APB2_RESET(DSI)>;
> + reset-names = "apb";
> + status = "disabled";
> + };
> +
> timer2: timer@40000000 {
> compatible = "st,stm32-timer";
> reg = <0x40000000 0x400>;
> diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts
> index 1626e00bb2cb..30ebbc193e82 100644
> --- a/arch/arm/boot/dts/stm32f769-disco.dts
> +++ b/arch/arm/boot/dts/stm32f769-disco.dts
> @@ -153,3 +153,53 @@ &usbotg_hs {
> pinctrl-names = "default";
> status = "okay";
> };
> +
> +&dsi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dsi_in: endpoint {
> + remote-endpoint = <&ltdc_out_dsi>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dsi_out: endpoint {
> + remote-endpoint = <&dsi_in_panel>;
> + };
> + };
> +
> + };
> +
> + panel: panel {
> + compatible = "orisetech,otm8009a";
> + reg = <0>; /* dsi virtual channel (0..3) */
> + reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +
> + port {
> + dsi_in_panel: endpoint {
> + remote-endpoint = <&dsi_out>;
> + };
> + };
> + };
> +};
> +
> +&ltdc {
> + dma-ranges;
> + status = "okay";
> +
> + port {
> + ltdc_out_dsi: endpoint {
> + remote-endpoint = <&dsi_in>;
> + };
> + };
> +};
>

\
 
 \ /
  Last update: 2020-04-27 10:30    [W:0.105 / U:7.732 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site