Messages in this thread Patch in this message | | | Date | Sun, 26 Apr 2020 18:42:48 -0000 | From | "tip-bot2 for Thomas Gleixner" <> | Subject | [tip: x86/mm] x86/tlb: Move cr4_set_bits_and_update_boot() to the usage site |
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The following commit has been merged into the x86/mm branch of tip:
Commit-ID: 96f59fe291d2cdc0fcb6f5f2f4b7c9cea9533fc3 Gitweb: https://git.kernel.org/tip/96f59fe291d2cdc0fcb6f5f2f4b7c9cea9533fc3 Author: Thomas Gleixner <tglx@linutronix.de> AuthorDate: Tue, 21 Apr 2020 11:20:39 +02:00 Committer: Borislav Petkov <bp@suse.de> CommitterDate: Sun, 26 Apr 2020 18:39:48 +02:00
x86/tlb: Move cr4_set_bits_and_update_boot() to the usage site
No point in having this exposed.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20200421092559.940978251@linutronix.de --- arch/x86/include/asm/tlbflush.h | 14 -------------- arch/x86/mm/init.c | 13 +++++++++++++ 2 files changed, 13 insertions(+), 14 deletions(-)
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index c22fc72..917deea 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -322,23 +322,9 @@ static inline void cr4_clear_bits(unsigned long mask) local_irq_restore(flags); } -/* - * Save some of cr4 feature set we're using (e.g. Pentium 4MB - * enable and PPro Global page enable), so that any CPU's that boot - * up after us can get the correct flags. This should only be used - * during boot on the boot cpu. - */ extern unsigned long mmu_cr4_features; extern u32 *trampoline_cr4_features; -static inline void cr4_set_bits_and_update_boot(unsigned long mask) -{ - mmu_cr4_features |= mask; - if (trampoline_cr4_features) - *trampoline_cr4_features = mmu_cr4_features; - cr4_set_bits(mask); -} - extern void initialize_tlbstate_and_flush(void); #define TLB_FLUSH_ALL -1UL diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index 71720dd..d37e816 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -194,6 +194,19 @@ struct map_range { static int page_size_mask; +/* + * Save some of cr4 feature set we're using (e.g. Pentium 4MB + * enable and PPro Global page enable), so that any CPU's that boot + * up after us can get the correct flags. Invoked on the boot CPU. + */ +static inline void cr4_set_bits_and_update_boot(unsigned long mask) +{ + mmu_cr4_features |= mask; + if (trampoline_cr4_features) + *trampoline_cr4_features = mmu_cr4_features; + cr4_set_bits(mask); +} + static void __init probe_page_size_mask(void) { /*
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