| From | Aisheng Dong <> | Subject | RE: [PATCH V2 03/10] clk: imx: imx8mp: fix pll mux bit | Date | Sun, 26 Apr 2020 04:23:13 +0000 |
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> From: Peng Fan <peng.fan@nxp.com> > Sent: Thursday, March 12, 2020 6:20 PM > > Same to i.MX8MN/i.MX8MM, pll BYPASS bit should be kept inside pll driver for > glitchless freq setting following spec. If exposing the bit, that means pll driver > and clk driver has two paths to touch this bit, which is wrong. > > So use EXT_BYPASS bit here. > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Regards Aisheng
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