Messages in this thread Patch in this message | | | From | Jiaxun Yang <> | Subject | [PATCH v5 5/6] MIPS: DTS: Loongson64: Add PCI Controller Node | Date | Fri, 24 Apr 2020 21:08:36 +0800 |
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Add PCI Host controller node for Loongson64 with RS780E PCH dts. Note that PCI interrupts are probed via legacy way, as different machine have different interrupt arrangement, we can't cover all of them in dt.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> -- v2: Clean-up --- arch/mips/boot/dts/loongson/rs780e-pch.dtsi | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/mips/boot/dts/loongson/rs780e-pch.dtsi b/arch/mips/boot/dts/loongson/rs780e-pch.dtsi index 8687c4f7370a..5e68ceae20ca 100644 --- a/arch/mips/boot/dts/loongson/rs780e-pch.dtsi +++ b/arch/mips/boot/dts/loongson/rs780e-pch.dtsi @@ -5,10 +5,25 @@ bus@10000000 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; - ranges = <0 0x10000000 0 0x10000000 0 0x10000000 + ranges = <0 0x00000000 0 0x00000000 0 0x00010000 /* I/O Ports */ + 0 0x10000000 0 0x10000000 0 0x10000000 0 0x40000000 0 0x40000000 0 0x40000000 0xfd 0xfe000000 0xfd 0xfe000000 0 0x2000000 /* PCI Config Space */>; + pci@1a000000 { + compatible = "loongson,rs780e-pci"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + + reg = <0 0x1a000000 0 0x02000000>; + + ranges = <0x01000000 0 0x00004000 0 0x00004000 0 0x00004000>, + <0x02000000 0 0x40000000 0 0x40000000 0 0x40000000>; + + bus-range = <0x00 0xff>; + }; + isa { compatible = "isa"; #address-cells = <2>; -- 2.26.0.rc2
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