lkml.org 
[lkml]   [2020]   [Apr]   [17]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRe: [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value
On Thu, Apr 16, 2020 at 11:55 PM Alexandre Belloni
<alexandre.belloni@bootlin.com> wrote:
>
> The first received byte is the MSB, followed by the LSB so the value needs
> to be byte swapped.
>
> Also, the ADC actually has a delay of one clock on the SPI bus. Read three
> bytes to get the last bit.

> + return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7;

I just realize, isn't it an open coded variant of ror() / rol()?

--
With Best Regards,
Andy Shevchenko

\
 
 \ /
  Last update: 2020-04-17 15:47    [W:0.174 / U:0.200 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site