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SubjectRe: [PATCH v3 03/13] task_isolation: add instruction synchronization memory barrier
On Thu, Apr 09, 2020 at 03:17:40PM +0000, Alex Belits wrote:
> Some architectures implement memory synchronization instructions for
> instruction cache. Make a separate kind of barrier that calls them.

Modifying the instruction caches requries more than an ISB, and the
'IMB' naming implies you're trying to order against memory accesses,
which isn't what ISB (generally) does.

What exactly do you want to use this for?

As-is, I don't think this makes sense as a generic barrier.

Thanks,
Mark.

>
> Signed-off-by: Alex Belits <abelits@marvell.com>
> ---
> arch/arm/include/asm/barrier.h | 2 ++
> arch/arm64/include/asm/barrier.h | 2 ++
> include/asm-generic/barrier.h | 4 ++++
> 3 files changed, 8 insertions(+)
>
> diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h
> index 83ae97c049d9..6def62c95937 100644
> --- a/arch/arm/include/asm/barrier.h
> +++ b/arch/arm/include/asm/barrier.h
> @@ -64,12 +64,14 @@ extern void arm_heavy_mb(void);
> #define mb() __arm_heavy_mb()
> #define rmb() dsb()
> #define wmb() __arm_heavy_mb(st)
> +#define imb() isb()
> #define dma_rmb() dmb(osh)
> #define dma_wmb() dmb(oshst)
> #else
> #define mb() barrier()
> #define rmb() barrier()
> #define wmb() barrier()
> +#define imb() barrier()
> #define dma_rmb() barrier()
> #define dma_wmb() barrier()
> #endif
> diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h
> index 7d9cc5ec4971..12a7dbd68bed 100644
> --- a/arch/arm64/include/asm/barrier.h
> +++ b/arch/arm64/include/asm/barrier.h
> @@ -45,6 +45,8 @@
> #define rmb() dsb(ld)
> #define wmb() dsb(st)
>
> +#define imb() isb()
> +
> #define dma_rmb() dmb(oshld)
> #define dma_wmb() dmb(oshst)
>
> diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h
> index 85b28eb80b11..d5a822fb3e92 100644
> --- a/include/asm-generic/barrier.h
> +++ b/include/asm-generic/barrier.h
> @@ -46,6 +46,10 @@
> #define dma_wmb() wmb()
> #endif
>
> +#ifndef imb
> +#define imb barrier()
> +#endif
> +
> #ifndef read_barrier_depends
> #define read_barrier_depends() do { } while (0)
> #endif
> --
> 2.20.1
>

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